Semiconductor Energy Laboratory Co., Ltd.

Yoko Chiba

Shunpei Yamazaki

Kengo Akimoto

Hideki Uochi

Shigeki Komori

Rihito Wada

Saishi Fujikawa

Kunio Hosoya

A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.

Semiconductor device

A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.

Display device

To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used.

Method for manufacturing semiconductor device

The number of photomasks is reduced in a method for manufacturing a liquid crystal display device which operates in a fringe field switching mode, whereby a manufacturing process is simplified and manufacturing cost is reduced. A first transparent conductive film and a first metal film are sequentially stacked over a light-transmitting insulating substrate; the first transparent conductive film and the first metal film are shaped using a multi-tone mask which is a first photomask; an insulating film, a first semiconductor film, a second semiconductor film, and a second metal film are sequentially stacked; the second metal film and the second semiconductor film are shaped using a multi-tone mask which is a second photomask; a protective film is formed; the protective film is shaped using a third photomask; a second transparent conductive film is formed; and the second transparent conductive film is shaped using a fourth photomask.

Method for manufacturing semiconductor device with pixel electrode over gate electrode of thin film transistor

To provide a structure suitable for a common connection portion provided in a display panel. A common connection portion provided in an outer region of a pixel portion has a stacked structure of an insulating layer formed using the same layer as a gate insulating layer, an oxide semiconductor layer formed using the same layer as a second oxide semiconductor layer, and a conductive layer (also referred to as a common potential line) formed using the same layer as the conductive layer, in which the conductive layer (also referred to as the common potential line) is connected to a common electrode through an opening in an interlayer insulating layer provided over the first oxide semiconductor layer and an electrode opposite to a pixel electrode is electrically connected to the common electrode through conductive particles.

Display device with pixel portion and common connection portion having oxide semiconductor layers

Method for manufacturing LCD with reduced mask count

A manufacturing method of the present invention includes a process using a first multi-tone mask, in which a first conductive layer in which a transparent conductive layer and a metal layer are stacked over a substrate, a gate electrode formed of a first conductive layer, and a pixel electrode formed of a single layer of the transparent conductive layer are formed, a process using a second multi-tone mask, in which a contact hole to the pixel electrode, and an island of an i-type semiconductor layer and an ntype semiconductor layer are formed after a gate insulating film, the i-type semiconductor layer, and the ntype semiconductor layer are formed, a process using a third photomask, in which a source electrode and a drain electrode are formed after a second conductive layer is formed, and a process using a fourth photomask, in which an opening region is formed after a protective film is deposited.

Method for manufacturing an LCD device employing a reduced number of photomasks including bottom and top gate type devices

Method for manufacturing an LCD device employing a reduced number of photomasks

Etching is performed using mask layers formed by a multi-tone mask which is a light-exposure mask through which light is transmitted to have a plurality of intensity, in a method for manufacturing a display device including an inverted staggered thin film transistor with a channel-etched structure. Further, a gate wiring layer and a source wiring layer are formed over a substrate in the same step, and the source wiring layer is separated (disconnected) at an intersection of the gate wiring layer and the source wiring layer. The separated source wiring layers are connected to each other electrically through an opening (a contact hole) via a conductive layer formed over a gate insulating layer in the same step as formation of source and drain electrode layers.

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Atsugi, Japan

Yoko Chiba