Mitsubishi Electric Corporation

Yoichi Nogami

Akira Inoue

Jun Fujita

Yoshitsugu Yamamoto

Kazuyasu Nishikawa

Kenichi Horiguchi

Shinnosuke Soda

Yoshinori Yokoyama

Kazuyo Endo

Hiroyuki Okazaki

Shinsuke Watanabe

Shinichi Miyakuni

Tomoyuki Asada

Norio Higashisaka

Yoshitaka Kamo

Toshiaki Kitano

Hidetoshi Koyama

Satoshi Miho

Kenji Mukai

Shigeo Yamabe

Toshikazu Hirayama

A field-effect transistor includes a gate electrode formed on an electron supply layer thereon, a source electrode and a drain electrode thereon; and also the field-effect transistor includes an insulation film for covering the electron supply layer, and an opening portion of the insulation film, having trapezoidal prism's oblique contour faces, being provided in a region to form the gate electrode in the insulation film. It is so arranged that the gate electrode is made to have a Schottky junction with respect to a region where the electron supply layer is exposed through the opening portion, and also that the trapezoidal prism's oblique contour faces each formed by the opening portion have inclination angles in a range from 25 degrees to 75 degrees with respect to a surface of the electron supply layer.

Field effect transistor

Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.

Semiconductor device, high-frequency power amplifier, and method of manufacturing semiconductor device

A semiconductor device includes: a semiconductor substrate having a main plane; a semiconductor element provided on the main plane of the semiconductor substrate; an electrode pad provided on the main plane of the semiconductor substrate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, and provided on the main plane of the semiconductor substrate; and an insulating film covering all region of a semiconductor of the main plane of the semiconductor substrate exposed inside the guard ring, wherein the insulating film is made of a water impermeable material.

Semiconductor device

A field effect transistor includes: a semiconductor substrate having a main surface; a plurality of source electrodes and a plurality of drain electrodes alternately disposed and ohmic-connected with the main surface of the semiconductor substrate; a plurality of gate electrodes Schottky-connected with the main surface of the semiconductor substrate and respectively disposed between the plurality of source electrodes and the plurality of drain electrodes; and a Schottky electrode Schottky-connected with the main surface of the semiconductor substrate, wherein each of the plurality of drain electrodes has first and second portions separated from each other, a sum of widths of the first and second portions of each drain electrode is smaller than a width of one source electrode, the Schottky electrode is disposed between the first portion and the second portion of the drain electrode.

A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.

Method for manufacturing semiconductor device

A semiconductor device includes: a Si substrate having first and second major surfaces facing in opposite directions; a buffer layer of AlGaN (0&#x2266;x&#x2266;1) on the first major surface of the Si substrate; an epitaxially grown crystalline layer of AlGaN (0&#x2266;y&#x2266;1, x&#x2260;y) on the buffer layer; a transistor on the epitaxially grown crystalline layer; and a filler of AlGaN and having the same x as the buffer layer. A through hole in the Si substrate extends from the second major surface to the buffer layer, and the through hole is filled with the filler.

Semiconductor device with improved conductivity

A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 10-10&#x3a9;/&#x25a1;.

A semiconductor device includes: a semiconductor substrate of a compound semiconductor material; a buffer layer, a channel layer, and a Schottky junction forming layer sequentially disposed on the semiconductor substrate, the buffer layer, the channel layer, and the Schottky junction forming layer each being compound semiconductor materials; a source electrode and a drain electrode located on the Schottky junction forming layer; and a gate electrode disposed between the source and drain electrodes and forming a Schottky junction with the Schottky junction forming layer. The carrier density in the channel layer varies with distance from a top surface of the channel layer and is inversely proportional to the third power of depth into the channel layer from the top surface of the channel layer. The buffer layer has a lower electron affinity than the channel layer and is a different compound semiconductor material from the channel layer.

A semiconductor device includes: a compound semiconductor substrate; a buffer layer, a channel layer, and a Schottky junction forming layer sequentially disposed on the compound semiconductor substrate, the buffer layer, the channel layer, and the Schottky junction forming layer each being compound semiconductor materials; a source electrode and a drain electrode located on the Schottky junction forming layer; and a gate electrode disposed between the source and drain electrodes and forming a Schottky junction with the Schottky junction forming layer. The dopant impurity concentration in the channel layer is inversely proportional to the third power of depth into the channel layer from a top surface of the channel layer. The gate electrode has a gate length in a range from 0.2 &#x3bc;m to 0.6 &#x3bc;m.

A semiconductor device includes: a compound semiconductor substrate; a buffer layer, a channel layer, and a Schottky junction forming layer sequentially formed on the compound semiconductor substrate, the buffer layer, the channel layer, and the Schottky junction forming layer each being a compound semiconductor; a source electrode and a drain electrode located on the Schottky junction forming layer; and a gate electrode disposed between the source and drain electrodes and forming a Schottky junction with the Schottky junction forming layer. The dopant impurity concentration profile in the channel layer is inversely proportional to the third power of depth into the channel layer from a top surface of the channel layer. The channel layer has fixed sheet dopant impurity concentration, and the top surface of the channel layer has a dopant concentration in a range from 5.0&#xd7;10cmto 2.0&#xd7;10cm.

In a semiconductor device, a SiN first protective insulating film is formed on a semiconductor layer. A T-shaped gate electrode is formed on the semiconductor layer. A SiN second protective insulating film spreads in an umbrella shape from above the T-shaped gate electrode. A hollow region is formed between the two SiN films. The SiN films are coated with a SiN third protective insulating film with the hollow region remaining.

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Tokyo, Japan

Yoichi Nogami