Hitachi, Ltd.

Other

Shin-Etsu Chemical Co., Ltd.

Nippondenso Co., Ltd.

Yoichi Nakashima

Hiroshige Okinoshima

Katsuhisa Kitano

Shuroku Sakurada

Tadaaki Kariya

Hideyuki Yagi

Katsumi Akabane

Kenji Iimura

Kazutoyo Narita

Satoshi Ikawa

Isao Kojima

Masayoshi Sugiyama

Atsushi Tani

Tadashi Nosaka

Yosikazu Takita

Sousi Suzuki

Michihiro Misawa

A sterilization method is provided which acquires microbicidal activity equivalent to plasma-treated solution or more powerful than the same without the use of a plasma generation device. The sterilization method includes applying liquid containing peroxynitric acid (HOONO) produced by chemical reaction to an object to be sterilized under acidic conditions of a pH value of 4.8 or lower. The liquid containing the peroxynitric acid is produced by mixing nitrous acid and peroxide together, for example, mixing nitrite and peroxide together.

Sterilization method, formulation for sterilization use, and device for producing sterilizing liquid

A semiconductor rectifying device, suitable for installation in vehicles, comprises a cup-shaped metallic container, a semiconductor chip having a pn junction, one of whose main surfaces is bonded to the bottom surface of the container, a lead bonded to the other main surface of the semiconductor chip, and a silicone resin layer containing silica powder, with which layer an exposed portion of the semiconductor chip is covered.

Semiconductor rectifying device and full-wave rectifier fabricated using

A high-speed diode with a PNN.sup.+ structure has a breakdown voltage of about 200 V, a forward voltage drop of 0.9 V or less, a reverse recovery time of 50 nsec or less, and a soft recovery characteristic, by making the impurity concentration in the surface of a P-layer equal to or less than 8.times.10.sup.18 atoms/cc, putting the thickness of the P-layer in a range from 2 to 6 .mu.m, putting the resistivity of an N-layer in a range from 5 to 12.OMEGA.-cm, putting the thickness of the N-layer in a range from 19 to 25 .mu.m, and putting the carrier lifetime in the N-layer in a range from 20 to 40 nsec.

High speed diode

This invention concerns a so-called double-moat uni-surface type semiconductor device in which two concentric moats are provided in one main surface of the substrate and the edges of the two pn-junctions for blocking main circuit voltages applied to the device are exposed in the surfaces of the moats. Semiconductor layers having high impurity concentrations and serving as channel stoppers are formed on the semiconductor layers exposed in the one main surface of the substrate, contiguous to the moats and spaced apart from the pn-junctions, each high impurity concentration layer having the same conductivity type as the semiconductor layer on which it is formed. The moats are filled with surface passivating material.

Semiconductor device with double moat and double channel stoppers

A semiconductor substrate comprises at the central portion a diode region which includes a P-type base layer, an N-type low impurity concentration layer and an N-type base layer and at the outer peripheral portion a thyristor region which includes an N-type emitter layer, a P-type base layer, an N-type low impurity concentration layer, an N-type base layer and a P-type emitter layer. The P-type base layer and the N-type emitter layer are in contact with a cathode electrode, the N-type base layer and the P-type emitter layer are in contact with an anode electrode, and the diode and thyristor regions are connected in anti-parallel. Contiguous to the outer periphery of the N-type base layer interposed between the N-type low impurity concentration layer and the P-type emitter layer is formed an N-type high impurity concentration region higher in impurity concentration than the N-type base layer. The N-type high impurity concentration region limits spreading of a depletion layer which is created when a forward voltage is applied to the thyristor region.

Thyristor device

Growing community of inventors

Ibaraki, Japan

Yoichi Nakashima