Hitachi, Ltd.

Hitachi Device Engineering Co., Ltd.

Hitachi Ulsi Engineering Corp.

Yoichi Matsuno

Masashi Horiguchi

Yoshinobu Nakagome

Shinichi Miyatake

Yasuhiro Kasama

Yasushi Kawase

Tathunori Mushya

A semiconductor memory having a redundancy circuit includes a judgment device for receiving outputs of first ROMs for storing a defective address therein and judging whether or not a defective memory cell and a spare memory cell to replace the defective memory cell belong to the same memory cell, and also includes a timing adjustment circuit for changing the timing of control signals applied to memory mat control circuits according to an output of the judgment device. When the defective and spare memory cells belong to the same memory mat, the timing of the control signals is made fast.

Semiconductor memory having redundancy circuit

Growing community of inventors

Kokubunji, Japan

Yoichi Matsuno