Texas Instruments Corporation

Yogendra C Pandya

Paul B Wood

Ronald L Smith

W S Henrion

LaVaughn F Watts

Lynn B King

A data display and management system includes a microprocessor whose functions are implemented by instructions in data from a directly connected main memory. A mass data storage memory is connected to the main memory and has permanently stored instructions therein for the microprocessor. A display control system which operates asynchronously with the microprocessor includes a display controller, display memory, character memory means, and a visual character attribute generator. By linking one or more row attribute bytes, or pointers, to each row of characters stored in the display memory the display controller performs character and row manipulation on a display device without transferring whole blocks of data in the display memory. Multi-region display segmentation into horizontal and vertical split regions, smooth or discrete scrolling of individual regions, and various editing functions are achieved by modifying the associated display memory pointers.

Display system with multiple scrolling regions

A display control system which operates asynchronously with a microprocessor includes a display controller, display memory, character memory means, and a visual character attribute generator. By linking one or more row attribute bytes, or pointers, to each row of characters stored in the display memory the display controller performs character and row manipulation on a display device without transferring whole blocks of data in the display memory. Multi-region display segmentation into horizontal and vertical split regions, smooth or discrete scrolling of individual regions, and various editing functions are achieved by modifying the associated display memory pointers. In one embodiment the display controller is a single integrated circuit device.

Display controller for multiple scrolling regions

An input/output controller provides a numer of adjustable timers for timing events such as for polling external devices and includes circuitry which generates interrupt vector signals upon the occurrence of certain events, including the expiration of time set in the adjustable timers and also upon receipt of signals from the external devices. The interrupt signals may be selectively masked when it is not desirable or practical for an interrupt to occur. The controller is an MOS N-channel device on a single chip and is packaged in a 40 pin package and is compatible with a Model TMS 8080 Microprocessor Unit.

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Houston, TX, United States of America

Yogendra C Pandya