Texas Instruments Corporation

Yoann Foucher

Hiroyuki Mizuno

A processor is provided for use with a memory having selectable memory areas. In an example, the processor includes a memory area selection circuit (MMU) to select one of the selectable memory areas, and an instruction fetch circuit to fetch a target instruction at an address from the selected memory area. The processor includes an execution circuit (Pipeline) to execute instructions from the instruction fetch circuit and to execute a first instruction for changing the selection by the MMU to a second selectable memory area. The Pipeline executes a branch instruction that points to a target instruction, where access to the target instruction depends on actual change of selection to the second memory area. The processor also includes a logic circuit to ensure fetch of the target instruction in response to the branch instruction after actual change of selection. Other circuits, devices, systems, apparatus, and processes are also disclosed.

Circuit, system, and method for determining whether a branch instruction is predicted based on a capture range of a second instruction

An electronic processor is provided for use with a memory () having selectable memory areas. The processor includes a memory area selection circuit (MMU) operable to select one of the selectable memory areas at a time, and an instruction fetch circuit () operable to fetch a target instruction at an address from the selected one of the selectable memory areas. The processor includes an execution circuit (Pipeline) coupled to execute instructions from the instruction fetch circuit () and operable to execute a first instruction for changing the selection by the memory area selection circuit (MMU) from a first one of the selectable memory areas to a second one of the selectable memory areas, the execution circuit (Pipeline) further operable to execute a branch instruction that points to a target instruction, access to the target instruction depending on actual change of selection to the second one of the memory areas; and the processor includes a logic circuit () operable to ensure fetch of the target instruction in response to the branch instruction after actual change of selection. Other circuits, devices, systems, apparatus, and processes are also disclosed.

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Portland, OR, United States of America

Yoann Foucher