Kabushiki Kaisha Toshiba

Toshiba Energy Systems & Solutions Corporation

Yo Sasaki

Atsushi Yamamoto

Hitoshi Matsumura

Yuuji Hisazato

Kazuya Kodani

Norio Takahashi

Masafumi Fujita

Yoshihiro Taniyama

Keiichi Matsushita

Tetsushi Okamoto

Daisuke Hiratsuka

Takashi Harakawa

Hiroaki Ishizuka

Fumio Sawa

Hidehito Matsuzaki

Takaaki Hirose

Miki Nakamura

According to one embodiment, there is provided a rotating electrical machine coil with a conductor and an insulation layer that is provided around the conductor to cover the conductor, the rotating electrical machine coil including a linear part of the coil and a coil end that is separable from and electrically connectable to the linear part of the coil.

Rotating electrical machine coil

According to one embodiment, a semiconductor device includes a semiconductor element, amounting substrate which has wiring layers containing copper, and a joining layer which is provided between the semiconductor element and the wiring layer and made of an alloy containing copper and metal other than copper, and in which a melting point of the alloy is higher than a melting point of the metal.

Semiconductor device and method of manufacturing the same

According to one embodiment, a semiconductor device includes a semiconductor element, an interconnection layer, and a bonding layer. The interconnection layer includes Cu. The bonding layer includes a first alloy that is an alloy of Cu and a first metal other than Cu between the semiconductor element and the interconnection layer. A melting point of the first alloy is higher than a melting point of the first metal.

Semiconductor device and method for manufacturing the same

According to one embodiment, a semiconductor device includes a semiconductor element, a mounting member including Cu, and a bonding layer provided between the semiconductor element and the mounting member. The bonding layer includes a first region including Ti and Cu, and a second region provided between the first region and the mounting member, and including Sn and Cu. A first position along the first direction is positioned between the semiconductor element and a second position along the first direction. The first position is where the composition ratio of Ti in the first region is 0.1 times a maximum value of the composition ratio of Ti. The second position is where the composition ratio of Sn in the second region is 0.1 times a maximum value of the composition ratio of Sn. A distance between the first position and the second position is not less than 0.1 micrometers.

According to one embodiment, the semiconductor device in the embodiment has an assembly substrate, a semiconductor chip, and a jointing layer. The semiconductor chip is joined to the assembly substrate via the jointing layer. An intervening diffusion barrier layer may be interposed between the chip and jointing layer. The jointing layer is an alloy layer mainly made of any metal selected from Sn, Zn and In or an alloy of Sn, Zn and In, and any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V or an alloy of any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V and any metal selected from Sn, Zn and In, where the alloy has a higher melting temperature than that of Sn, Zn and In or an alloy of Sn, Zn and/or In.

Semiconductor device and manufacturing method of semiconductor device

Growing community of inventors

Saitama, Japan

Yo Sasaki