Xiamen Tianma Micro-electronics Co., Ltd.

Yiqiang Lin

Hao Wu

Poping Shen

Boping Shen

Wei Wu

Renliang Zhu

Jinliang Huang

Kunfeng Zhang

Zonghua Qiao

Provided are an array substrate, a display panel, and a display device. The array substrate includes a substrate, and touch electrodes and touch leads located at a side of the substrate. The touch lead extends along a first direction. The touch electrode includes a groove and a first portion that are arranged along the first direction. The touch electrodes include a first touch electrode. The touch leads include a first touch lead including a first line segment and a second line segment. A line width of the first line segment is smaller than a line width of the second line segment. Along a direction perpendicular to a plane of the substrate, the first touch lead overlaps the first touch electrode, the first line segment at least partially overlaps the first portion, and the second line segment at least partially overlaps the groove.

Array substrate, display panel, and display device

Provided are a display panel and a display device, which relate to the field of display technology. The display panel includes a source line and a signal line group including a first signal line group, the first signal line group includes a first signal line and a second signal line. The first signal line includes a first line segment and a second line segment which are coupled. The second signal line includes a third line segment and a fourth line segment which are coupled. Along the first direction, a distance between the first line segment and a source line is less than or equal to a distance between the third line segment and the source line, and a distance between the second line segment and the source line is greater than or equal to a distance between the fourth line segment and the source line.

Display panel and display device

A display panel, a control method of a display panel and a display device are provided. The display panel includes a display area, a non-display area including source connection lines, clock control signal lines, active signal lines, first soldering pads, second soldering pads, a control circuit electrically connected to and configured to control two driver chips to not output active signals to the correspondingly connected active signal lines at the same time, and not to output driving signals to the correspondingly connected clock control signal lines at the same time. At least one first target soldering pad and a second target soldering pad are connected to the same driver chip. The minimum distance between the first target soldering pad and the second target soldering pad is greater than half of the length of the driver chip in the second direction.

Display panel, control method of display panel and display device

A display panel and a display apparatus includes sub-pixels, and First and second regions arranged along a first direction. First sub-pixel groups in the first region and second sub-pixel groups in the second region are arranged along the first direction, and each include at least two sub-pixels arranged along the second direction. A number of the sub-pixels in the second sub-pixel group close to the first region is greater than a number of the sub-pixels in the second sub-pixel groups away from the first region. The first sub-region of the second region is closer to the first region than the second sub-region. From the first region to the second region, a variation rate of the numbers of the sub-pixels in the second sub-pixel groups in the first sub-region is greater than a variation rate of the numbers of the sub-pixels in the second sub-pixel groups in the second sub-region.

Display panel and display apparatus

In the display panel, a display region includes a plurality of sub-pixels arranged in an array, and a non-display region includes a plurality of demultiplexers, a plurality of signal source lines and M timing control lines. Each of the plurality of demultiplexers includes N gating switches, where in the same demultiplexer, input terminals of a plurality of gating switches are electrically connected to the same signal source line, an output terminal of each of the plurality of gating switches is electrically connected to one column of sub-pixels, and control terminals of the plurality of gating switches are electrically connected to different timing control lines. data signals transmitted by at least two signal source lines electrically connected to at least two gating switches controlled by a timing control line have opposite voltage polarities.

A display panel includes data lines and scanning lines in a display region, and a demultiplexer in a non-display region. The demultiplexer includes m branches. m is an integer. m&#x2265;2. Each branch includes a switching transistor which includes a first electrode coupled with an input terminal of the demultiplexer, a second electrode coupled with one of the data lines, and a control electrode for receiving a switching control signal. The demultiplexer includes a first demultiplexer including a compensation transistor, of which first and second electrodes are short-circuited. The compensation transistor is coupled with the data line and has a control electrode for receiving a compensation control signal. The compensation control signal received by the compensation transistor in the branch has one functional rising edge in a period during which the scanning line provides an effective level signal once.

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Xiamen, China

Yiqiang Lin