Globalfoundries Singapore Pte. Ltd.

Yinjie Ding

Eng Huat Toh

Kangho Lee

Elgin Kiok Boone Quek

Shyue Seng Tan

Bin Liu

Integrated circuits with magnetic random access memory (MRAM) devices and methods for fabricating such devices are provided. In an exemplary embodiment, a method for fabricating MRAM bitcells includes determining a desired inter-cell spacing between a first bitcell and a second bitcell and double patterning a semiconductor substrate to form semiconductor fin structures, wherein the semiconductor fin structures are formed in groups with an intra-group pitch between grouped semiconductor fin structures and with the inter-cell spacing between adjacent groups of semiconductor fin structures different from the intra-group pitch. The method further includes forming a first MRAM memory structure over the semiconductor fin structures in the first bitcell and forming a second MRAM memory structure over the semiconductor fin structures in the second bitcell. Also, the method includes forming a first source line for the first bitcell between the first MRAM memory structure and the second MRAM memory structure.

Integrated circuits with magnetic random access memory (MRAM) devices and methods for fabricating such devices

A method of forming a bulk transistor integrated with silicon-on-insulator (SOI) field plates, and related device, are provided. Embodiments include forming a silicon-on-insulator (SOI) substrate as a field plate on a field plate oxide; forming a high-voltage p-type well in a p-type substrate of a bulk transistor on which the SOI substrate is formed, the high-voltage p-type formed between shallow trench isolation (STI) region of the p-type substrate; forming an n-drift region in the high-voltage p-type well; forming a first gate on the high-voltage p-type well; and implanting a first n-type region adjacent to the gate as a source region and a second n-type region adjacent to the SOI substrate as a drain region.

Transistors with field plates on fully depleted silicon-on-insulator platform and method of making the same

A method of forming a segmented FDSOI STT-MRAM using dummy WL blocks and the resulting device are provided. Embodiments include forming a plurality of FDSOI STT-MRAM active WL blocks laterally separated across a memory array; forming a FDSOI STT-MRAM dummy WL block parallel to and on opposite sides of each active WL block; forming a plurality of SL structures laterally separated across the memory array; forming a plurality of BL structures laterally separated across the memory array; and connecting the plurality of SL and BL structures to the plurality of active WL blocks.

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Singapore, Singapore

Yinjie Ding