Intel Corporation

Yingzhe Shen

Xiangbin Wu

Tin-Fook Ngai

Zhiyuan Zhang

Xinxin Zhang

Qianying Zhu

Chunxiao Lin

Haitao Ji

Xin Zhou

Chao Zhang

Yimin Zhang

Zhigang Wang

Ping Guo

Lidan Zhang

Sangeeta Ghangam Manepalli

Sai Luo

Siew Wen Chin

Xuesong Shi

Shunyu Zhu

Li Shang

Qi She

Disclosed herein are systems, methods, and devices for using adaptive learning to identify objects. An object-identifying device performs a first object identification based on one or more features of a first modality of an object retrieved from an image frame including the object and a first database including first modality identification features. A second object identification is performed based on one or more features of a second modality of the object retrieved from the image frame and a second database including second modality identification features. The second database is updated by adaptively learning a new second modality identification feature according to a first identification result of the first object identification. The second object identification is trained with the updated second database and determines a final identification result by integrating a first identification result of the first object identification and a second identification result of the second object identification.

Object identification based on adaptive learning

Embodiments of the present disclosure provide devices, techniques, and configurations for network interface controllers (NICs) that log write packets received from a network in non-volatile random access memory (NVRAM). In one embodiment, a NIC includes a network interface to couple a host of the NIC to a network, a NVRAM, and a controller coupled with the network interface and the NVRAM, where the controller is to log write packets received at the network interface from the network in the NVRAM. Other embodiments may be described and/or claimed.

Network interface controller with non-volatile random access memory write packet log

An embodiment of a memory apparatus may include a logger to log memory access data in persistent storage media, a log indexer communicatively coupled to the logger to index the memory access log data in an index table in a system memory, and a key compressor communicatively coupled to the log indexer to compress an index key for the index table. Other embodiments are disclosed and claimed.

Log structure with compressed keys

Apparatuses, methods and storage medium associated with a memcached system are disclosed herewith. In embodiments, a client device of the memcached system may include memory and one or more processors coupled with the memory. Further, the client device may include memcached logic configured to receive a request to Get or Set a value corresponding to a key in the memcached system, determine, in response to the receive, whether the key results in a hit in a local cache maintained in memory by the memcached logic, and service the Get or Set request based at least in part on whether a result of the determine indicates the key results in a hit in the local cache. In embodiments, a server of the memcached system may include complement memcached logic to server a Get, Set or an Update request. Other embodiments may be described and/or claimed.

Memcached systems having local caches

Particular embodiments described herein can offer an electronic fabric for a processing system that includes a fabric adapter to couple to a first fabric associated with a first system and to couple to a second fabric associated with a second system. The fabric adapter is configured to pass bidirectional communications between the first system and the second system. The electronic fabric can further include an address translation agent configured to map a first physical address in a first address space of the first system to a second physical address in a second address space of the second system.

Bridging and integrating devices across processing systems

Generally, this disclosure provides technologies for generating and executing partially vectorized code that may include backward dependencies within a loop body of the code to be vectorized. The method may include identifying backward dependencies within a loop body of the code; selecting one or more ranges of iterations within the loop body, wherein the selected ranges exclude the identified backward dependencies; and vectorizing the selected ranges. The system may include a vector processor configured to provide predicated vector instruction execution, loop iteration range enabling, and dynamic loop dependence checking.

Partial vectorization compilation system

Growing community of inventors

Beijing, China

Yingzhe Shen