Taiwan Semiconductor Manufacturing Comp. Ltd.

Ying-Wen Huang

Chih-Hsiang Yao

Wen-Chuan Chiang

Jye-Yen Cheng

Yi-Chun Huang

An embodiment semiconductor device includes a first conductive feature in a dielectric layer and a second conductive feature over the dielectric layer and electrically connected to the first conductive feature. The second conductive feature includes a dual damascene structure and further includes a top portion within both a line portion and a via portion of the second conductive feature and a bottom portion in the via portion of the second conductive feature. The bottom portion comprises a different conductive material than the top portion, and a thickness of the bottom portion is at least about twenty percent of a total thickness of the via portion of the second conductive feature.

Interconnect structures and methods of forming same

A device includes a dielectric layer, a metal line in the dielectric layer, and a via underlying and connected to the metal line. Two dummy metal patterns are adjacent to the metal line, and are aligned to a straight line. A dummy metal line interconnects the two dummy metal patterns. A width of the dummy metal line is smaller than lengths and widths of the two dummy metal patterns, wherein the width is measure in a direction perpendicular to the straight line. Bottoms of the two dummy metal patterns and the dummy metal line are substantially level with a bottom surface of the metal line.

Growing community of inventors

Hsin-Chu, Taiwan

Ying-Wen Huang