Microjet Technology Company, Ltd.

Ying-Lun Chang

Chi-Feng Huang

Yung-Lung Han

Hao-Jan Mou

Shih-Chang Chen

Wei-Ming Lee

Jia-Yu Liao

Hsien-Chung Tai

Jheng-Wei Chen

Chia-Hao Chang

Hung-Hsin Liao

Che-Wei Huang

Shou-Hung Chen

Chao-Chih Chen

Ta-Wei Hsueh

Chang-Yen Tsai

Chun-Yi Kuo

Tsung-I Lin

Chin-Wen Hsieh

Rong-Ho Yu

Tse-Chi Mou

Chin-Yi Chou

Hsiang-Dyi Wu

Cheng-Hung Yu

Wen-Hsiung Liao

Cheng-Ming Chang

Ching-Sung Lin

Chin-Chuan Wu

Arnold Chang-Mou Yang

Kwo-Yuan Shi

Chih-Feng Lin

Tsung-Pat Chou

Hung-Chun Tsai

Shih-Che Chiu

Kou-Yow Tseng

Fu-San Lin

Chin-Tsung Chen

Chun-Cheng Ho

Yee-Shyi Chang

Shiang-Ching Cheng

Yau-Ji Lee

A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas. The gas is introduced into the flowing-channel space through the inlet apertures and transported into the airbag through the outlet aperture, to inflate the airbag for blood pressure measurement, and a detection datum of blood pressure outputted by the gas-pressure-sensing element is transmitted to the microprocessor to calculate.

Blood pressure detection device

A wafer structure is disclosed and includes a chip substrate and an inkjet chip. The chip substrate is a silicon substrate fabricated by a semiconductor process on a wafer of 12 inches. The inkjet chips are formed on the chip substrate by the semiconductor process and diced into the inkjet chip. The inkjet chip includes plural ink-drop generators generated by the semiconductor process on the chip substrate. Each of the plurality of ink-drop generators includes a nozzle. A diameter of the nozzle is in a range between 0.5 micrometers and 10 micrometers. A volume of an inkjet drop discharged from the nozzle is in a range between 1 femtoliter and 3 picoliters. The ink-drop generators form plural longitudinal axis array groups having a pitch and plural horizontal axis array groups having a central stepped pitch equal to or less than 1/600 inches.

Wafer structure

A wafer structure is disclosed and includes a chip substrate and at least one inkjet chip having plural ink-drip generators. Each ink-drop generator includes a thermal-barrier layer, a resistance heating layer and a protective layer. The thermal-barrier layer is formed on the chip substrate, the resistance heating layer is formed on the thermal-barrier layer, a part of the protective layer is formed on the resistance heating layer, and the barrier layer is formed on the protective layer. The ink-supply chamber has a bottom in communication with the protective layer, and a top in communication with the nozzle. The thermal-barrier layer has a thickness of 500&#x2dc;5000 angstroms, the protective layer has a thickness of 150&#x2dc;3500 angstroms, the resistance heating layer has a thickness of 100&#x2dc;500 angstroms, the resistance heating layer has a length of 5&#x2dc;30 microns, and the resistance heating layer has a width of 5&#x2dc;10 microns.

A wafer structure including a chip substrate and plural inkjet chips is disclosed. The chip substrate is a silicon substrate fabricated by a semiconductor process on a wafer of at least 12 inches. The inkjet chips are formed on the chip substrate by the semiconductor process and diced into the first inkjet chip and the second inkjet chip. Each of the first inkjet chip and the second inkjet chip includes plural ink-drop generators. Each of the ink-drop generators includes a nozzle. A diameter of the nozzle is in a range between 0.5 micrometers and 10 micrometers. A volume of an inkjet drop discharged from the nozzle is in a range between 1 femtoliter and 3 picoliters. The ink-drop generators form plural longitudinal axis array groups having a pitch and form plural horizontal axis array groups having a central stepped pitch equal to 1/600 inches or less.

A wafer structure is disclosed and includes a chip substrate and plural inkjet chips having plural ink-drip generators. Each ink-drop generator includes a thermal-barrier layer, a resistance heating layer and a protective layer. The thermal-barrier layer is formed on the chip substrate, the resistance heating layer is formed on the thermal-barrier layer, a part of the protective layer is formed on the resistance heating layer, and the barrier layer is formed on the protective layer. The ink-supply chamber has a bottom in communication with the protective layer, and a top in communication with the nozzle. The thermal-barrier layer has a thickness of 500&#x2dc;5000 angstroms, the protective layer has a thickness of 150&#x2dc;3500 angstroms, the resistance heating layer has a thickness of 100&#x2dc;500 angstroms, the resistance heating layer has a length of 5&#x2dc;30 microns, and the resistance heating layer has a width of 5&#x2dc;10 microns.

A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate fabricated by a semiconductor process. At least one inkjet chip is directly formed on the chip substrate by the semiconductor process and diced into the at least one inkjet chip for inkjet printing. Each of the inkjet chip includes a plurality of ink-drop generators produced by a semiconductor process and formed on the chip substrate. Each of the ink-drop generators includes a thermal-barrier layer, a resistance heating layer, a conductive layer, a protective layer, a barrier layer, an ink-supply chamber and a nozzle.

A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate fabricated by a semiconductor process on a wafer of at least 12 inches. The inkjet chips include at least one first inkjet chip and at least one second inkjet chip directly formed on the chip substrate by the semiconductor process, respectively, and the plurality of inkjet chips are diced into the at least one first inkjet chip and the at least one second inkjet chip for inkjet printing. Each of the first inkjet chip and the second inkjet chip includes a plurality of ink-drop generators produced by a semiconductor process and formed on the chip substrate. Each of the ink-drop generators includes a thermal-barrier layer, a resistance heating layer, a conductive layer, a protective layer, a barrier layer, an ink-supply chamber and a nozzle.

A wafer structure is disclosed and includes a chip substrate and at least one inkjet chip. The chip substrate is a silicon substrate fabricated by a semiconductor process. The inkjet chip is directly formed on the chip substrate by the semiconductor process, whereby the wafer structure is diced, and the inkjet chip is produced, to be implemented for inkjet printing. The inkjet chip includes a plurality of ink-drop generators produced by the semiconductor process and formed on the chip substrate. Each of the ink-drop generators includes a barrier layer, an ink-supply chamber and a nozzle, and the ink-supply chamber and the nozzle are integrally formed in the barrier layer.

A wafer structure is disclosed and includes a chip substrate and at least one inkjet chip. The chip substrate is a silicon substrate which is fabricated by a semiconductor process on a wafer of at least 12 inches. The at least one inkjet chip is directly formed on the chip substrate by the semiconductor process, and the wafer is diced into the at least one inkjet chip, to be implemented for inkjet printing.

A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate which is fabricated by a semiconductor process. The plurality of inkjet chips include at least one first inkjet chip and at least one second inkjet chip. The plurality of inkjet chips are directly formed on the chip substrate by the semiconductor process, respectively, and diced into the at least one first inkjet chip and the at least one second inkjet chip, to be implemented for inkjet printing. Each of the first inkjet chip and the second inkjet chip includes a plurality of ink-drop generators produced by the semiconductor process and formed on the chip substrate. Each ink-drop generator includes a barrier layer, an ink-supply chamber and a nozzle. The ink-supply chamber and the nozzle are integrally formed in the barrier layer.

A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate which is fabricated by a semiconductor process on a wafer of at least 12 inches. The plurality of inkjet chips include at least one first inkjet chip and at least one second inkjet chip. The plurality of inkjet chips are directly formed on the chip substrate by the semiconductor process, respectively, and diced into the at least one first inkjet chip and the at least one second inkjet chip, to be implemented for inkjet printing.

A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate which is fabricated by a semiconductor process on a wafer of at least 12 inches. The plurality of inkjet chips include at least one first inkjet chip and at least one second inkjet chip. The plurality of inkjet chips are directly formed on the chip substrate by the semiconductor process, respectively, and diced into the at least one first inkjet chip and the at least one second inkjet chip, to be implemented for inkjet printing. Each of the first inkjet chip and the second inkjet chip includes a plurality of ink-drop generators produced by the semiconductor process and formed on the chip substrate.

A gas detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a light-emitting element, a particle-sensing element, a gas-sensing element, a driving-chip element and an encapsulation layer. The driving-chip element controls driving operations of the microelectromechanical element, the light-emitting element, the particle-sensing element and the gas-sensing element, respectively. When the microelectromechanical element is enabled to actuate transportation of gas, the gas is introduced into the gas detection device through an inlet aperture of the substrate. Scattered light spots generated by the light beam of the light-emitting element irradiating on suspended particles contained in the gas are received by the particle-sensing element to generate a detection datum of the suspended particles. The gas-sensing element detects the gas passing through and generates a detection datum of hazardous gas contained in the gas. Finally, the gas is discharged from an outlet aperture of the encapsulation layer.

Gas detection device

An actuating and sensing module includes a substrate, at least one sensor and at least one actuating device. The at least one sensor is disposed on the substrate. The at least one actuating device is disposed on the substrate, and has at least one guiding channel between the actuating device and the substrate. The at least one guiding channel is disposed on one side of the at least one sensor. When the at least one actuating device is enabled, a fluid is transferred to the at least one sensor through the at least one guiding channel, so that the fluid is sensed by the at least one sensor.

Actuating and sensing module

A micro-electromechanical fluid control device includes at least one flow guiding unit. The at least one flow guiding unit includes an inlet plate, a substrate, a resonance membrane, an actuating membrane and an outlet plate sequentially stacked. A first chamber is defined between the resonance membrane and the actuating membrane and a second chamber is defined between the actuating membrane and the outlet plate. While the piezoelectric membrane of the flow guiding unit drives the actuating membrane, a fluid is inhaled into the convergence chamber via the inlet of the inlet plate, transported into the first chamber via the central aperture of the resonance membrane, transported into the second chamber via a vacant space of the actuating membrane, and discharged out from the outlet of the outlet plate, so as to control the fluid to flow.

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Hsinchu, Taiwan

Ying-Lun Chang