Taiwan Semiconductor Manufacturing Comp. Ltd.

Ying-Jui Huang

Chung-Shi Liu

Chien Ling Hwang

Ching-Hua Hsieh

Chien-Ling Hwang

Yi-Li Hsiao

Cheng-Chung Lin

Hsin-Hung Liao

Chen-Hua Douglas Yu

Bor-Ping Jang

Chih-Wei Lin

Wen-Hsiung Lu

Chih-Hang Tung

Tung-Liang Shao

Meng-Wei Chou

Su-Chun Yang

De-Yuan Lu

Kuo Cheng Lin

Chia-Sheng Huang

Chen-Shien Chen

Yu-Feng Chen

Yeong-Jyh Lin

Kuo Lung Pan

Pei-Hsuan Lee

Yi-Yang Lei

Hsiao-Chung Liang

Zheng-Yi Lim

Yu-Ting Chiu

Jen-Chun Liao

Lin-Wei Wang

A method for laminating a film to a wafer and apparatus for performing the lamination process are disclosed. The method includes providing the wafer and the film in a process chamber where the wafer and the film are separated from each other, achieving a vacuum state and a process temperature in the process chamber, and laminating the film to contact a surface of the wafer.

Lamination apparatus and method

A method and an apparatus for bonding semiconductor substrates are provided. The apparatus includes a first support configured to carry a first semiconductor substrate and a second semiconductor substrate bonded to each other, a gauging component embedded in the first support and comprising a fiducial pattern, and a first sensor disposed proximate to the gauging component, and configured to emit a light source towards the fiducial pattern of the gauging component.

Method and apparatus for bonding semiconductor substrate

A method includes picking up a first package component, removing an oxide layer on an electrical connector of the first package component, placing the first package component on a second package component after the oxide layer is removed, and bonding the first package component to the second package component.

Bonding with pre-deoxide process and apparatus for performing the same

A pickup apparatus for separating a semiconductor package from an adhesive film includes a platform, a roller, a moving mechanism, and a collector element. The platform has a surface disposed with the adhesive film, where the adhesive film is disposed between the platform and the semiconductor package. The roller is disposed inside the platform and under the adhesive film, where the roller includes a body and a plurality of protrusions distributed over the body. The moving mechanism is connected to the roller to control a movement of the roller. The collector element is disposed over the platform and the adhesive film, where the collector element is configured to remove the semiconductor package from the adhesive film.

Pickup apparatus and method of using the same

A method includes placing a first package component and a second package component over a carrier. The first conductive pillars of the first package component and second conductive pillars of the second package component face the carrier. The method further includes encapsulating the first package component and the second package component in an encapsulating material, de-bonding the first package component and the second package component from the carrier, planarizing the first conductive pillars, the second conductive pillars, and the encapsulating material, and forming redistribution lines to electrically couple to the first conductive pillars and the second conductive pillars.

Aligning bumps in fan-out packaging process

A method and an apparatus for bonding semiconductor substrates are provided. The method includes at least the following steps. A first position of a first semiconductor substrate on a first support is gauged by a gauging component embedded in the first support and a first sensor facing towards the gauging component. A second semiconductor substrate is transferred to a position above the first semiconductor substrate by a second support. A second position of the second semiconductor substrate is gauged by a second sensor mounted on the second support and located above the first support. The first semiconductor substrate is positioned based on the second position of the second semiconductor substrate. The second semiconductor substrate is bonded to the first semiconductor substrate.

A method of fabricating a semiconductor package structure is provided. The method includes applying a plurality of first adhesive portions onto a carrier; applying a second adhesive portion onto the carrier; disposing a plurality of micro pins respectively in the first adhesive portions, such that each of the micro pins has a first portion embedded in a corresponding one of the first adhesive portions and a second portion protruding from said corresponding one of the first adhesive portions; bonding a die to the second adhesive portion; forming a molding compound surrounding the micro pins and the die; and removing the carrier from the molding compound after forming the molding compound.

Method of fabricating semiconductor package structure

A conductive micro pin includes a body having a first end surface, a second end surface, a first side surface connecting the first end surface and the second end surface, and a first corner between the first end surface and the first side surface, in which the first side surface is substantially flat, and the first corner is substantially rounded.

Conductive micro pin

A semiconductor package structure includes a molding compound, a micro pin extending through the molding compound, and a die surrounded by the molding compound. The micro pin has a top surface, a bottom surface, and a sidewall extending from the bottom surface to the top surface of the micro pin. The sidewall of the micro pin has a first portion and a second portion. The first portion of the sidewall is adjacent to the bottom surface of the micro pin and free of the molding compound. The second portion of the sidewall is adjacent to the top surface of the micro pin and in contact with the molding compound.

Semiconductor package structure

A semiconductor package includes a carrier, at least and adhesive portion, a plurality of micro pins and a die. The carrier has a first surface and second surface opposite to the first surface. The adhesive portion is disposed on the first surface, and the plurality of the micro pins is disposed in the adhesive portions. The die is disposed on the remaining adhesive portion free of the micro pins.

Interconnect structure for semiconductor package and method of fabricating the interconnect structure

A method of manufacturing micro pins includes forming a release layer over a substrate. A pattern layer is formed over the release layer, in which the pattern layer has a plurality of openings spaced apart to each other and through the pattern layer. A plurality of micro pins are respectively formed in the openings. The pattern layer and the release layer are removed to obtain the micro pins. An isolated conductive micro pin for connecting one or more components is also provided.

Method of manufacturing micro pins and isolated conductive micro pin

Provided is an integrated fan-out package including a die, a first redistribution circuit structure, a second redistribution circuit structure, a plurality of solder joints, a plurality of conductive posts, and an insulating encapsulation. The first redistribution circuit structure and the second redistribution circuit structure are formed respectively over a back surface and an active surface of the die to sandwich the die. The solder joints are formed aside the die and connected to the first redistribution circuit structure. The conductive posts are formed on the solder joints and connected to the second redistribution circuit structure, and connected to the first redistribution circuit structure through the solder joints. A plurality of sidewalls of the die, a plurality of sidewalls of the conductive posts, and a plurality of sidewalls of the solder joints are encapsulated by the insulating encapsulation. A fabricating process of the integrated fan-out package is also provided.

Integrated fan-out package and method of fabricating the same

A method includes moving a first bond head along a first guide apparatus for a first loop. The first guide apparatus is configured in a ring shape. The method also includes picking up a first die using the first bond head during the first loop, and aligning the first die with a first package substrate. The aligning the first die with the first package substrate includes moving the first package substrate in a first direction and a second direction. The first direction and the second direction are contained in a first plane parallel to the first loop. The method further includes placing the first die over the first package substrate during the first loop.

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Taipei, Taiwan

Ying-Jui Huang