Industrial Technology Research Institute

Ying-Jiunn Lai

Chang-Sheng Chen

Uei-Ming Jow

Chin-Sun Shyu

Ching-Liang Weng

Min-Lin Lee

Chang-Lin Wei

Shinn-Juh Lay

Syun Yu

Chun-Kun Wu

Shinn-Juh Lai

Pei-Shen Wei

Pel-Shen Wei

A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.

Multi-functional composite substrate structure

A high frequency and wide band impedance matching via is provided, applicable to multi-layer printed circuit boards, for example. The multi-layer circuit board may include several signal transmission traces, several ground layers, signal transmission vias and ground vias. The signal transmission traces and the ground layers may be sited on different circuit layers, and each signal transmission trace may be opposite to one of the ground layers. The signal transmission vias may be connected between the signal transmission traces. The ground vias may be connected between the ground layers. The ground vias may be opposite to the signal transmission vias, and the ground vias corresponding to the signal transmission vias may be sited to stabilize the characteristic impedance of the transmission traces.

High frequency and wide band impedance matching via

A circuit board with embedded components includes a plurality of embedded components and at least one transmission line electrically connected to at least one of the embedded components and having a terminal circuit. Therefore, a measuring device is used to be electrically connected to the transmission line and send out a signal, so as to receive a corresponding reflected signal, and then, compare the received reflected signal with a signal pattern in the database to obtain an electrical parameter of the embedded component.

Circuit board with embedded components and manufacturing and measuring method thereof

A complementary mirror image embedded planar resistor architecture is provided. In the architecture, a complementary hollow structure is formed on a ground plane or an electrode plane to minimize the parasitic resistance, so as to efficiently enhance the application frequency. In addition, in some cases, some signal transmission lines pass through the position below the embedded planar resistor, and if there is no shield at all, serious interference or cross talk phenomenon occurs. Therefore, the complementary hollow structure of the ground plane, the electrode plane, or a power layer adjacent to the embedded planar resistor is designed to be a mesh structure, so as to reduce the interference or cross talk phenomenon. In this manner, the whole resistor structure has preferable high frequency electrical characteristic in the circuit.

Complementary mirror image embedded planar resistor architecture

A switch module consists of a build-up multi-layer structure and some passive devices. The build-up multi-layer structure has multitudes of conductive layers and dielectric layers laminated upon each another. At least one dielectric layer is interfered between any two conductive layers. Any one passive device is a portion of at least one conductive layer and electrically connects multitudes of conductive pads on the surface of the build-up multi-layer structure.

High-frequency switch in multi-layer substrate

An adjustable resistor embedded in a multi-layered substrate and method for forming the same. The adjustable resistor comprises: a planar resistor, having a plurality of terminals; and a plurality of connecting lines connected to the planar resistor, each of the connecting lines being drawn from each of the terminals of the planar resistor so as to form a resistor network, wherein the connecting lines are selectively broken by a process for drilling the substrate to form a number of combinations of opened connecting lines such that the resistance value of the adjustable resistor is varied and thus the resistance value of the adjustable resistor can be precisely adjusted.

Adjustable resistor embedded in multi-layered substrate and method for forming the same

A resistor structure embedded in a multi-layer circuit board and manufacturing method thereof are provided. Resistive material is coated on any layer among the multi-layer circuit board, and two symmetric electrodes are formed in the geometric center of the resistive material area. The two electrodes are disposed in the resistive material layer and are covered by the resistive material. And the two electrodes are led out from respective bores at the central position of the resistive electrodes, for connecting to any other metal layer. This resistor structure can avoid the unstable resistance when the coated resistor is operated at high frequency, and also avoid the formation untrimmed edges during coating that affects the precision of resistance.

Film resistor embedded in multi-layer circuit board and manufacturing method thereof

A capacitor structure with a cross-coupling design is provided. In the capacitor structure, conductive lines or electrode plates are coupled together by cross coupling an electrode above or below or aside the other electrode. By cross coupling and fewer vias, the largest capacitance value can be obtained within a minimum area. The capacitor structure provided can also be applied to a high-frequency high-speed module or system to enhance noise inhibition capability of a capacitive substrate.

Capacitor structure

A multi-layered printed circuit board embedded with a filter, the multi-layered printed circuit board using a composite multi-layered printed circuit board formed of at least a high dielectric material stacked with at least a low dielectric material. A plurality of serial or parallel capacitors are disposed in the composite multi-layered printed circuit board so as to form a filter. At least one capacitor is an interdigital capacitor disposed on a low dielectric material. Metal electrodes of the interdigital capacitor are located on the same plane such that the area of the metal electrodes or the spacing between the metal electrodes can be adjusted in advance to precisely control the electrical properties such as the center frequency and the transmission loss of the filter. Problems resulting from alignment errors caused in manufacturing the composite multi-layered printed circuit board can also be prevented.

Multi-layered printed circuit board embedded with filter

A balanced-to-unbalanced transformer embedded with a filter, the balanced-to-unbalanced transformer being disposed in a multi-layered substrate and comprising vertically coupled transmission lines designed in different layers in the multi-layer substrate to increase transmission performances. A capacitor and a transmission line are connected to a single-ended I/O port of the balanced-to-unbalanced transformer such that a filter is embedded in the balanced-to-unbalanced transformer.

Balanced-to-unbalanced transformer embedded with filter

A symmetrical capacitor includes at least a first metal layer and a second metal layer. Each of the metal layers has a first electrode plate and a second electrode plate separated by a predetermined distance. The first electrode plates on the metal layers are symmetrical, and the second electrode plates on the metal layers are symmetrical. Given the symmetrical structure of the capacitor, the output ports of the capacitor have the same electrical features. Therefore, there will not be a direction problem when the capacitor is used, and the symmetrical electrical features are improved.

Symmetrical capacitor

The present invention describes an intermediate for use in a capacitive printed circuit board (PCB), which relates to a capacitive apparatus and manufacturing method for a built-in capacitor with a non-symmetrical electrode used to reduce inaccuracy of the error compression alignment on laminates. The invention employs a plurality of different sized metal laminates stacked for a built-in capacitor to achieve a high-precise capacitor PCB. More particularly, the invention can raise the capability of noise-immunity of a capacitive PCB applied to high frequency/speed modules and systems, and also provides precise capacitance to regular circuit design for the need of compact package and high-precise capacitance in the future.

Capacitive apparatus and manufacturing method for a built-in capacitor with a non-symmetrical electrode

A miniaturized multi-layer balun includes a pair of capacitive elements, at least one section of broadside coupled lines connected in series to an unbalanced and two balanced ports through a pair of transmission lines. Each section has first and second coupled lines. A ground connection is located between two central second coupled lines, and connected to a ground. By means of a multi-layer structure and the addition of a ground connection, the balun of the invention can be fabricated with five conductor layers. This not only greatly decreases the size of the balun device, but also enhances the stability of the device. From the measured return loss and differences in magnitude and phase to the frequency response, it shows that the balun of the invention has good impedance match.

Miniaturized multi-layer balun

An embedded microelectronic capacitor incorporating at least one ground shielding layer is provided which includes an upper ground shielding layer that has an aperture therethrough; an electrode plate positioned spaced-apart from the upper ground shielding layer that has a via extending upwardly away from the electrode plate through the aperture in the upper ground shielding layer providing electrical communication to the electrode plate without shorting to the upper ground shielding layer; a middle ground shielding layer positioned in the same plane of the electrode plate, surrounding while spaced-apart from the electrode plate at a predetermined distance; a lower ground shielding layer positioned spaced-apart from the electrode plate in an opposing relationship to the upper ground shielding layer; and a dielectric material embedding the upper ground shielding layer; the middle ground shielding layer and the lower ground shielding layer.

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Hsinchu, Taiwan

Ying-Jiunn Lai