Inventec Corp.

Inventec (pudong) Technology Corporation

Ying-Chih Lu

Ling-Hung Yu

Chi-Tsung Chang

Chia-Hsing Lee

Chun-Yi Lee

Meng-Hua Cheng

Yu-Hui Wang

Chun-Lung Wu

Szu-Hsien Lee

Chin-Lung Wu

Wen-Ping Huang

Shing-Yu Chen

A server system and an updating method of firmware are provided, and the updating method includes: acquiring a configuration file which includes firmware packet data which corresponds to a node in the server system; sending a notification signal to a web server of the node described in the configuration file; acquiring a version annotation and update package data in the configuration file according to the notification signal; storing the version annotation and the update package data to obtain file paths of the version annotation and the update package data; and selectively installing the update package data to the node according to internet protocol addresses of the file paths and the node.

Server system and update method thereof

A method for executing a system management interrupt (SMI) is provided. When a power on self test (POST) is executed, a first identifier is generated and stored into a system management mode block of a memory. During a process for starting an operating system (OS), the first identifier is read from the system management mode block as a second identifier, and the second identifier is stored into an OS block of the memory. When the OS wants to use a system management interrupt, the first identifier and the second identifier are respectively read from the system management mode block and the OS block. Afterwards, it is determined whether the first identifier and the second identifier are the same. If the first identifier and the second identifier are the same, the SMI is executed.

Method for executing system management interrupt by using identifiers

A power management method of a computer system is provided. The method includes the following steps. Health states of a plurality of power supplies are detected to generate a detection signal. Output powers provided by the power supplies are received to calculate a total maximum output power of the power supplies. An interrupt is generated by triggering a configuration management program according to the total maximum output power or the detection signal. The interrupt is processed by an interrupt handler to adjust a power consumption of a central processing unit (CPU).

Computer system and power management method thereof

A method for protecting data in damaged memory cells by dynamically switching memory mode is provided. The method is adapted to an electronic device having a memory, which has a memory controller and at least one memory module, each of which is consisted of a plurality of memory cells, and the memory cells are divided into a plurality of pages. A power-on self test is executed and a mirror memory mode is activated to protect the data in the memory modules. An uncorrectable error of each page of the memory modules is detected by the memory controller when an operating system reads the memory. If the uncorrectable error in one page is detected, the memory module having the page is determined as a damaged memory module, and the mirror memory mode is switched to a spare memory mode, so as to protect the data in the memory modules.

Method for protecting data in damaged memory cells by dynamically switching memory mode

A method for processing power-off suitable for a server system is provided. The server system includes a first node, a second node, and a power supply. The first and second nodes share the power supply. The method includes the following steps. A power-off process is performed by the first and second nodes respectively according to a power-off signal. An interception process is activated to intercept a completion signal generated in the power-off process, and an interrupt is triggered. The interrupt is performed by an interrupt handler, so as to detect whether the first and second nodes complete a power-off process. When the first and second nodes already complete the power-off process, the interception process is inactivated and the generated completion signal is recovered and transferred to the power supply for turning off a power.

Server system and method for processing power off

A data protection method for damaged memory cells is provided. A power-on self-test (POST) is executed, and an initial backup memory is reserved in a memory. An operating system (OS) is executed, and data is loaded from a kernel region of the OS in the memory into a mirror region, so that when a processor accesses the data in the kernel region, it also accesses the data in the mirror region. An uncorrectable error (UE) is detected to determine a damaged page, and a backup page is selected from the initial backup memory or dynamically obtained from the OS to back up data in the damaged page. A mapping address of the damaged page and backup page are recorded into a page mapping table in a memory controller. Accordingly, when the OS accesses the damaged page, the memory controller accesses the backup page instead according to the page mapping table.

Data protection method for damaged memory cells

An abnormal status detecting method of interrupt pins is provided. In the invention, an advanced configuration and power interface (ACPI) table is looked up for obtaining an interrupt status bit of each interrupt pin in a computer system. Afterwards, the interrupt status bit is continuously checked whether it is maintained at a specific value during a fixed time. When the interrupt status bit of one of the interrupt pins is maintained at the specific value during the fixed time, the interrupt pin is determined to be abnormal.

Abnormal status detecting method of interrupt pins

A method for executing the power on self test (POST) on the computer system and a method for updating the SMBIOS information partially are provided for a computer system with a first memory and a second memory, wherein the first memory comprises a first storage block and a second storage block. A user can previously set the specific SMBIOS information in the second storage block. And during the POST stage, the default SMBIOS information in the BIOS code loaded from the first storage block to the second memory will be partially updated according to the specific SMBIOS information set by the user. As a result, the purpose of using the appropriated SMBIOS information to initiate the computer system can be achieved.

Method for executing power on self test on a computer system and updating SMBIOS information partially

The present invention discloses a method for protecting data in a hard disk, which is applied to the hard disk, such that if a computer executes boot codes of the hard disk and a hard disk identification code recorded by the hard disk is determined to be identical to a computer identification code stored in a computer, the hard disk can be read, which subsequently allows an operating system to be initialized, or else the content in a partition table area will be cleared and the hard disk cannot be read, thus the initialization of the operating system cannot be completed.

Method for protecting data in a hard disk

A method for accessing a memory is provided. The method includes entering a memory accessing mode for updating a top of low memory (TOLM) value stored in a TOLM register in a chipset of a system with a highest memory address when a memory accessing command is received. The memory accessing command requests the utilization of a memory block in a memory of the system corresponding to an address space occupied by a memory-mapped input output (MMIO) function. The system then accesses the corresponding memory block in the memory according to the address space recorded in the memory accessing command. After the access is completed, the memory accessing mode is closed and the original TOLM value is written back to the TOLM register. Therefore, the present invention can access the 'MMIO memory block' to prevent a waste of the memory.

Method for accessing memory

A computer program runtime bottleneck diagnostic method and system is proposed, which is designed for use in conjunction with a computer platform for providing a BIOS (Basic Input/Output System) POST (Power On Self Test) runtime bottleneck diagnostic function, which is characterized by the capability of recording the runtime length of each of the constituent code modules of the BIOS POST routine during runtime such that a diagnostic report in electronic form can be generate to show which one of the constituent code modules of the BIOS POST routine is most time-consuming during runtime to allow BIOS POST program developers to make modifications to the code to make it more optimized and thus more efficient to run with a reduced runtime length. This feature allows the computer platforms with the optimized BIOS POST routine to have a faster startup time and thus more competitive on the market.

Computer program runtime bottleneck diagnostic method and system

A data protection method of a storage device, applied in a computer having a storage device, is provided. The storage device is consisted of a plurality of blocks. The method includes the following steps. When a data containing a plurality of bit data is stored in the storage device in the computer, the stored bit data is checked bit by bit. If an incorrect bit data is checked, the data in the block containing the incorrect bit data is backed up to a reserved block. Therefore, the memory capacity of the storage device is not occupied while backing up data, so as to improve the reliability of the computer.

Data protecting method of storage device

A boot-switching apparatus suitable for a system having a plurality of processors and a plurality of memories and a method thereof are provided. While booting the system, a single timer is used for counting down a time-out and it is determined whether a disabling signal sent by a Basic Input/Output System (BIOS) is received during the countdown. If the disabling signal is not received and the time-out is up, whether the processors operate normally is further detected and a plurality of detection signals is obtained. Next, whether each of the detection signals matches its corresponding enabling signal is determined. If the two do not match, the corresponding processor is disabled. If all of them match, the memories are switched. Accordingly, the problem of misjudgment in the prior art can be resolved and the system can be led to select normal processor and memory for executing its booting.

Boot-switching apparatus and method for multiprocessor and multi-memory system

A data protection method of a storage device is provided. In the method, a system management interrupt program orders a hardware control unit to obtain a type and an address message of an error in a block in a first storage device, and stores the type and address message in a second storage device. An interrupt service routine (ISR) reads the type and address message of the error from the second storage device. The ISR orders an operating system to search for a block that may be accessed normally and not damaged in the first storage device, and sets the block as a reserved block. The ISR transmits the address message of the error to the OS, such that the OS copies the data in the block having the error to the reserved block, thereby increasing the available capacity of the storage device and improving the reliability of the computer.

Data protection method of storage device

A method for initiating a system is provided. In the present invention, a specific data, which is not used for executing an initiating program of an interface device, is moved from a conventional memory to an extended memory temporarily, such that the available space of the conventional memory is increased. As a result, the computer system can have enough conventional memory space for loading and executing the initiating program of the interface device during a Power-On Self Test (POST) so as to achieve the purpose of initiating the system.

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Taipei, Taiwan

Ying-Chih Lu