Wistron Corporation

Intel Corporation

Silicon Motion, Inc.

Ying-Chen Lin

Shih-Lien L Lu

Chih-Yi Wang

Chia-Lin Yang

Wen-Tai Lin

Kuo-Wei So

Yu-Chi Chung

Apparatus, systems, and methods for data movement in a memory device are described. In one embodiment, a memory controller comprises logic to move a row of data from a first row of a memory in a first section of a memory device to a second row of memory in a second section of the memory device without passing the data through a communication interface. Other embodiments are also disclosed and claimed.

Data movement in memory devices

A keyboard module adapted to be used in an electronic device. The electronic device has a casing. The casing has a containing opening. The keyboard module contained in the containing opening includes a bottom plate, an elastic component, a cover and a key cap disposed on the elastic component. The bottom plate disposed within the casing has a circuit. The elastic component is disposed on the bottom plate or the circuit. The cover movably disposed in the containing opening is located above the bottom plate. The cover has an opening aligned to the elastic component. A portion of the key cap protrudes from the opening. Another portion of the key cap interferes with the opening, such that the key cap resists elasticity of the elastic component and moves to shorten a distance between the key cap and the bottom plate when the cover moves toward the bottom plate.

Keyboard module and electronic device having the same

A method and apparatus for performing clock extraction are provided. The method includes: performing edge analysis on a Training Sequence Equalization (TSEQ) pattern carried by a set of received signals that are received from a Universal Serial Bus (USB) port of an electronic device, to dynamically generate a plurality of analysis results; and performing frequency calibration on a frequency of an output clock of a Numerically Controlled Oscillator (NCO) according to a frequency that different types of analysis results within the plurality of analysis results alternatively occur, to utilize the output clock as a reference clock after completing the frequency calibration. More particularly, the method further includes: generating a set of de-multiplexed signals respectively corresponding to a plurality of bits, to perform the edge analysis by comparing respective voltage levels of de-multiplexed signals corresponding to every two adjacent bits of the plurality of bits within the set of de-multiplexed signals.

Method and apparatus performing clock extraction utilizing edge analysis upon a training sequence equalization pattern

A frame assembly for installing panel modules with different dimensions is disclosed. The frame assembly includes a first frame and a second frame. The first frame has a first fixing structure formed thereon and a first sliding structure in an axis direction. The second frame has a second fixing structure formed thereon and a second sliding structure in the axis direction. The second sliding structure is slidably engaged with the first sliding structure. The first fixing structure and the second fixing structure are fixed on a side of a first panel module or on a side of a second panel module when the second frame slides relative to the first frame in the axis direction to a first position or to a second position.

Growing community of inventors

Taipei, Taiwan

Ying-Chen Lin