National Semiconductor Corporation

Advanpack Solutions Pte Ltd.

Yin Yen Bong

Jaime A Bayan

Peter Howard Spalding

Santhiran Nadarajah

Ah Lek Hu

Sharon Mei Wan Ko

Aik Seng Kang

Harry Cheng Hong Kam

Kim Hwee Tan

Ma L Nang Htoi

Ch'ng Han Shen

Lim Tiong Soon

Shikui Lui

Harry Cheng-Hong Kam

Rosemarie Tagapulot

Balasubramanian Sivagnanam

A die, comprising a substrate and one or more pillar structures formed over the substrate in a pattern and the method of forming the die.

Die pillar structures and a method of their formation

An assembly and method suitable for use in packaging integrated circuits including a support substrate for supporting an integrated circuit die embedded in a molded encapsulating cap. The substrate includes a conductive die attach pad adapted to be molded into the encapsulating cap. The pad includes an interior facing support surface and a spaced-apart exterior facing exposed surface defined by a peripheral edge. The support surface is adapted to support the embedded die, while the exposed surface is to be exposed from the encapsulating cap. The attach pad further includes a locking ledge portion extending outward peripherally beyond at least a portion of the exposed surface peripheral edge. This ledge is adapted to be subtended in the encapsulating cap in a manner substantially preventing a pull-out of the attach pad in a direction away from the encapsulating cap.

Locking lead tips and die attach pad for a leadless package apparatus and method

A variety of leadless packaging arrangements and methods of packaging integrated circuits in leadless packages that are arranged to have relatively low inductance are disclosed. In one aspect, a leadless semiconductor package is described having an exposed die pad and a plurality of exposed contacts that are formed from a common substrate material. The die attach pad, however, is thinned relative to at least a portion of the contacts. A die is mounted on the thinned die attach pad and wire bonded to the contacts. Since the die attach pad is lower than the contact surface being wire bonded to, the length of the bonding wires can be relatively reduced, thereby reducing inductance of the device. A plastic cap is molded over the die and the contacts thereby encapsulating the bonding wires while leaving the bottom surface of the contacts exposed. In some embodiments, the die is arranged to overhangs beyond the die attach pad towards the contacts. In other embodiments, a portion of at least some of the contacts are thinned to a thickness substantially similar to the die attach pad to form contact shelves. The die is then mounted such that it bridges the die attach pad to the contact shelves. In some of the embodiments, reverse wire bonding is used to further shorten the bonding wires. The described devices are packaged in bulk on a conductive substrate panel.

Low inductance leadless package

A variety of techniques for electrically debussing conductive substrate panels used in the formation of a matrix of leadless integrated circuit packages are described. Generally, after a matrix of leadless packages have been fabricated in panel form on a conductive substrate panel, tie bars that are used to support contacts and potentially other structures on the conductive substrate are removed after plastic caps have been molded over the matrix, but before separating the packaged devices. This serves to electrically isolate the contacts from one another while leaving sufficient portions of the molded substrate structure in tact to facilitate handling the structure in panel form. With the described arrangement, the packaged devices may be tested in panel form. After testing and any other desired panel based operations, the packaged devices may be separated using conventional techniques. The removal of the tie bars can be accomplished by any suitable technique including, for example, sawing or etching.

Electrical isolation in panels of leadless IC packages

Growing community of inventors

Melaka, Malaysia

Yin Yen Bong