Other

Kla Corporation

Shanghai National Engineering Research Center of Digital Television Co., Ltd.

International Business Machines Corporation

Kla Tencor Corporation

Shanghai National Engineering Research Center of Digital Teievision Co., Ltd.

Yin Xu

Wenjun Zhang

Yunfeng Guan

Dazhi He

Xufeng Guo

Yijun Shi

Liequan Lee

John Josef Hench

Thaddeus Gerard Dziura

Andrei Veldman

Antonio Arion Gellineau

Houssam Chouaib

Aaron J Rosenberg

Nicholas M Williamson

Jonathan Iloreta

Pu Yp Yang

Kaiwen Xu

Abhi Gunde

Andrei V Shchegrov

Rui-Fang Shi

Jun Sun

Ge Huang

Jonathan M Madsen

Lie-Quan Lee

Yao Wang

Yanfeng Wang

Song Qing Wu

Pablo Rovira

Tianrong Zhan

Yang Dai

Wenfei Gu

Weiqiang Liang

A metrology system is disclosed. In one embodiment, the metrology system includes a controller communicatively coupled to a reference metrology tool and an optical metrology tool, the controller including one or more processors configured to: generate a geometric model for determining a profile of a test HAR structure from metrology data from a reference metrology tool; generate a material model for determining one or more material parameters of a test HAR structure from metrology data from the optical metrology tool; form a composite model from the geometric model and the material model; measure at least one additional test HAR structure with the optical metrology tool; and determine a profile of the at least one additional test HAR structure based on the composite model and metrology data from the optical metrology tool associated with the at least one HAR test structure.

Loosely-coupled inspection and metrology system for high-volume production process monitoring

Machine learning techniques are used to predict values of fixed parameters when given reference values of critical parameters. For example, a neural network can be trained based on one or more critical parameters and a low-dimensional real-valued vector associated with a spectrum, such as a spectroscopic ellipsometry spectrum or a specular reflectance spectrum. Another neural network can map the low-dimensional real-valued vector. When using two neural networks, one neural network can be trained to map the spectra to the low-dimensional real-valued vector. Another neural network can be trained to predict the fixed parameter based on the critical parameters and the low-dimensional real-valued vector from the other neural network.

Automatic optimization of measurement accuracy through advanced machine learning techniques

An interleaving and mapping method and a deinterleaving and demapping method for an LDPC codeword are provided. The interleaving and mapping method comprises: performing first bit interleaving on a parity bits part of the LDPC codeword to obtain interleaved parity bits; splicing an information bit part of the codeword and the interleaved parity bits into a codeword after the first bit interleaving; dividing the codeword after the first bit interleaving into multiple consecutive bit subblocks in a predetermined length, and changing the order of the bit subblocks according to a corresponding permutation order (bit-swapping pattern) to form a codeword after second bit interleaving; dividing the codeword after the second bit interleaving into two parts, and writing the two parts into storage space in a column order respectively and reading the two parts from the storage space in a row order respectively to obtain a codeword after third bit interleaving.

Interleaving and mapping method and deinterleaving and demapping method for LDPC codeword

A semiconductor metrology tool inspects an area of a semiconductor wafer. The inspected area includes a plurality of instances of a 3D semiconductor structure arranged periodically in at least one dimension. A computer system generates a model of a respective instance of the 3D semiconductor structure based on measurements collected during the inspection. The computer system renders an augmented-reality or virtual-reality (AR/VR) image of the model that shows a 3D shape of the model and provides the AR/VR image to an AR/VR viewing device for display.

Visualization of three-dimensional semiconductor structures

A semiconductor metrology tool inspects an area of a semiconductor wafer. The inspected area includes a plurality of instances of a 3D semiconductor structure arranged periodically in at least one dimension. A computer system generates a model of a respective instance of the 3D semiconductor structure based on measurements collected during the inspection. The computer system renders an image of the model that shows a 3D shape of the model and provides the image to a device for display.

A scum or floating oil concentration device comprises a scum or floating oil concentration cone () and a scum or floating oil conveyor (). Said scum or floating oil conveyor () is arranged above said scum or floating oil concentration cone (). Said scum or floating oil conveyor () comprises a conveying helix () rotating around a shaft, a scum or floating oil conveying pipe () and a skimmer (). Said conveying helix () is arranged inside said scum or floating oil conveying pipe (). An opening is arranged on said scum or floating oil conveying pipe (). Said skimmer () is arranged at said opening of said scum or floating oil conveying pipe (). An inclined separation plate () and a scum or floating oil collection and concentration system are further provided in the present invention.

Scum concentration device

A floating weir skimmer comprises a collecting box (), a weir plate () and an inner buoy (). Said collecting box () comprises a baffle plate () and a trough (). A guide rail () is arranged inside said trough (). An inner buoy () is arranged inside collecting box (), and a guide pulley () is arranged on said inner buoy (), enabling said inner buoy () to slide on said guide rail (). A supporting member is further arranged on said inner buoy (). One end of said weir plate () is carried by said supporting member, and the other end is in rotation connection with said trough ().

Floating weir skimmer

Disclosed are methods and apparatus for providing feature classification for inspection of a photolithographic mask. A design database for fabrication of a mask includes polygons that are each defined by a set of vertices. Any of the polygons that abut each other are grouped together. Any grouped polygons are healed so as to eliminate interior edges of each set of grouped polygons to obtain a polygon corresponding to a covering region of such set of grouped polygons. Geometric constraints that specify requirements for detecting a plurality of feature classes are provided and used for detecting a plurality of feature classes in the polygons of the design database. The detected features classes are used to detect defects in the mask.

Polygon-based geometry classification for semiconductor mask inspection

An interleaving and mapping method and a deinterleaving and demapping method for an LDPC codeword are provided. The interleaving and mapping method comprises: performing first bit interleaving on a check part of the LDPC codeword to obtain a check bit stream; splicing an information bit part of the codeword and the check bit stream into a codeword after the first bit interleaving; dividing the codeword after the first bit interleaving into multiple consecutive bit subblocks in a predetermined length, and changing the order of the bit subblocks according to a corresponding permutation order (bit-swapping pattern) to form a codeword after second bit interleaving; dividing the codeword after the second bit interleaving into two parts, and writing the two parts into storage space in a column order respectively and reading the two parts from the storage space in a row order respectively to obtain a codeword after third bit interleaving; and performing constellation mapping on the codeword after the third bit interleaving according to a constellation diagram to obtain a symbol stream; the permutation orders (bit-swapping patterns) and the constellation diagrams used in the interleaving and mapping processing of LDPC codes with different code rates, code length and LDPC code tables are designed and optimized using theoretical analysis. The technical solution reduces the receiving threshold of the receiving end.

This invention discloses a digital TV broadcast system coordinated with a broadband communication network, an information transmission network in which the broadcast system is applied, a digital TV heterogeneous network architecture, and a client terminal used in each of the above network systems. The various broadcast system architectures of the invention adopt the design concept of heterogeneous network which integrates a broadcast network with other networks, for example, a communication network, the Internet and the like, to form a heterogeneous network architecture coordinating various networks. Meanwhile, the usage in bad conditions are taken into account, and a broadcast TV system which enables uplink transmission by using a broadcast link is designed. The terminal of the invention is a terminal applicable in these heterogeneous network architectures, is capable of receiving signals transmitted from various networks, and can enable flexible receiving and access modes with a series of control means. The network system and client terminal of the invention can achieve an optimized allocation of network resources, save spectrum resources, and enable optimized transmission and management of information resources.

Digital television network structure and user terminal

Administering the polling of a number of devices for device status including determining whether a task identification for polling the device is in the delayed polling queue; if the task identification for polling the device is not in the delayed polling queue, determining whether the task identification for polling the device is in the immediate polling queue; if the task identification for polling the device is in the immediate polling queue; calculating a new time interval for polling the device in dependence upon a predetermined base period and a random selection of a time offset, wherein the time offset is within a predetermined range; calculating a next polling time for polling the device in dependence upon the current time and the new time interval; inserting the task identification in the delayed polling queue in dependence upon the next polling time.

Administering the polling of a number of devices for device status

Growing community of inventors

Shanghai, China

Yin Xu