Taiwan Semiconductor Manufacturing Comp. Ltd.

Yin-Shen Chu

Jen-Cheng Liu

Hung-Ming Chen

Yi-Chen Huang

Jun-Lung Huang

Ching-Hui Ma

Li-Chih Chaio

Chia-Piao Lee

Hong-Ming Chen

Methods of preventing photoresist scum formation for etch processes for patterning material layers of semiconductor device material layers are disclosed. A treatment of Nand Ois used to prevent the formation of photoresist scum. The treatment may be performed in-situ, and may be performed during the etch process, after the etch process, or both. The treatment is particularly beneficial when implemented during the patterning of low dielectric constant material layers, and when used for the formation of isolated via patterns.

Prevention of trench photoresist scum

A method for selectively etching a semiconductor feature opening to controllably achieve a critical dimension accuracy including providing a semiconductor wafer including a first opening formed extending through a thickness of at least one dielectric insulating layer and having an uppermost inorganic BARC layer; depositing a photoresist layer over the uppermost BARC layer and patterning the photoresist layer to form an etching pattern for etching a second opening overlying and encompassing the first opening; carrying out a first plasma assisted etching process to etch through a thickness of the BARC layer including a predetermined amount of CO in a plasma etching chemistry to increase an etching resistance of the photoresist layer; and, carrying out a second plasma assisted etching process to etch through a thickness portion of the at least one dielectric insulating layer to form the second opening.

Method for selectively controlling damascene CD bias

A method for improving a photolithographic patterning process to avoid undeveloped photoresist contamination in a semiconductor manufacturing process including providing a first semiconductor feature having an anisotropically etched opening including sidewalls. The first semiconductor feature further provide an overlying photoresist layer photolithographically patterned for anisotropically etching a second semiconductor feature opening overlying and encompassing the first semiconductor feature; blanket depositing a polymeric passivation layer over the overlying photoresist layer including covering at least a portion of the sidewalls including polymeric containing residues; and, removing the polymeric passivation layer including a substantial portion of the polymeric containing residues from at least a portion of the sidewalls prior to anisotropically etching the second semiconductor feature.

Method for removing polymeric residue contamination on semiconductor feature sidewalls

Growing community of inventors

Taichung, Taiwan

Yin-Shen Chu