Beijing Zitiao Network Technology Co., Ltd.

Analog Devices International Unlimited Company

Analog Devices,inc.

Yijing Lin

Jiaxin Wang

Yiwei Bai

Yu Zhang

Zheng Zhen

Zhijun Cai

Wenming Wu

Jianing Xu

Yulei Nie

Peixun Zhong

Yifei Chen

Display screen or portion thereof with a graphical user interface

In an example, a battery management system may include a host microcontroller, which may be operated in accordance with a first clock signal; and a first analog front end (AFE) circuit. The first AFE circuit may be operated in accordance with a second clock signal that may be unsynchronized with the first clock signal. The first AFE circuit may also include first digital circuitry to (1) accumulate a first value corresponding to a number of ADC sample cycles of the first ADC, and to (2) accumulate a second value corresponding to the digital output representative of the first battery current for the ADC sample cycles accumulated in the first value. The first AFE circuit may transfer a representation of the first value and a representation of the second value to the host microcontroller in response to a request from the host microcontroller.

Distributed coulomb counter

A battery management system may include a host microcontroller, operated in accordance with a first clock signal. The battery management system may also include a first sensor, which may be configured to measure a first value of a first group of one or more cells in a battery system. A first AFE circuit may include a first pulse-width modulation (PWM) controller, which may be configured to at least one of enable or power on the first sensor while a first PWM signal from the first PWM controller is in a first state, and may be configured to at least one of disable or power off the first sensor while the first PWM signal is in a second state. The first AFE circuit may also include a first storage register, which may be configured to receive a representation of the first value measured while the first sensor is on and enabled.

Distributed battery property measurement system

A video editing method is provided. A clip identifier in one-to-one correspondence with a video clip indicated by a video editing template is displayed based on the video editing template, to prompt a user to import a video material for a specified video clip corresponding to the clip identifier; in response to a trigger operation of presenting an editing result, the editing result, which is obtained by applying, on a target video material, a specified editing operation indicated by the video editing template, is presented, wherein the target video material corresponds to the specified video clip; the target video material is used to be imported into the corresponding specified video clip to form the editing result; and if the specified video clip includes a first video clip into which the user does not import a video material, a preset video material is added into the first video clip.

Video editing method and apparatus

The present disclosure relates to a layout adjustment method and apparatus, a device, a storage medium, and a program product. The method includes: displaying a multimedia editing interface, where the multimedia editing interface includes a canvas, a material attribute panel, a material display area and a track editing area, and the canvas is configured to display a multimedia image corresponding to multimedia data; and adjusting, in response to receiving an adjustment operation on the canvas, size information and/or position information of the canvas based on the adjustment operation. In the multimedia editing interface of embodiments of the present disclosure, a user can adaptively adjust the size and position of the canvas, and display other areas in a transparent manner, such that the user can view the multimedia image displayed on the entire canvas at any time.

Layout adjustment method and apparatus, device, storage medium, and program product

A fully on-chip clock generator on an integrated circuit ('IC') includes a frequency detector for receiving a reference current and providing a first voltage; an error integrator for receiving the first voltage from the frequency detector, comparing it with a reference voltage, and providing a control voltage; a voltage controlled oscillator ('VCO') for receiving the control voltage from the error integrator, and providing an output clock; and a logic controller on the IC, coupled between the VCO and the frequency detector, and generating logic control signals for controlling the frequency detector. The fully on-chip clock generator requires no external crystal, but its power consumption is significantly lower than a relaxation oscillator that generates the same clock frequency.

Method and apparatus for generating on-chip clock with low power consumption

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Beijing, China

Yijing Lin