Radiawave Technologies Co., Ltd.

Yigao Shao

Ning Zhang

Jon Sweat Duster

Yulin Tan

Haigang Feng

The present disclosure provides a power amplifier and an electrical device. The two-stage power amplifier architecture is tuned staggered before power combining. A previous stage matching network and its input matching are split into a cascaded staggered tuning, such that the center frequency is at frequency pointless than the design frequency point and frequency pointgreater than design frequency point, and then the power combining stage is tuned at the design frequency point. At advanced process nodes (such as 65 nm or below), compared with the known architecture, in-band signal quality and out-of-band filtering effect of the power amplifier chip integrating this architecture will be better when using the same number of transformers (same area), the reliability will be better. Due to its good flatness within the band, this architecture is especially suitable for carrier aggregation communication occasions.

Power amplifier and electronic device

The present disclosure provides a dual-edge triggered ring buffer and a communication system. The dual-edge triggered ring buffer includes a logic clock generation module and a data writing module. The logic clock generation module is configured to generate a corresponding first logic clock signal upon detecting an input of the trigger signal corresponding to the multiple first trigger signal input terminals, or to generate a corresponding second logic clock signal upon detecting an input of the trigger signal corresponding to the multiple second trigger signal input terminals. The data writing module is configured to write data output from the external system through the multiple corresponding input terminals according to the first logic clock signal or the second logic clock signal.

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Shenzhen, China

Yigao Shao