Cadence Design Systems, Inc.

Yifeng Wang

Chih-Chang Lin

Cheng-Ta Hsieh

Kuang-Chien Chen

Yung-Te Lai

Some aspects provide determination of a function to rectify functional differences between netlist Gand netlist Ghaving inputs V. The determination may include determination of a signal s of netlist Gthat can be re-synthesized so as to correct the functional differences between netlist Gand netlist G, assignment of respective static values to a first plurality of inputs V, assignment of respective initial values to a second plurality of inputs V, determination of a first function based on the assigned static values, the assigned initial values, a first error function reflecting the difference between outputs of netlist Gand netlist Gfor each vector of inputs V in a case that s equals 0, and a second error function reflecting the difference between the outputs of netlist Gand netlist Gfor each vector of inputs V in a case that s equals 1. Also included may be determination of whether the first function rectifies the functional differences between netlist Gand netlist G, assignment, if it is determined that the first function does not rectify the functional differences, of respective next values to the second plurality of inputs, and determination of a second function based on the first function, the assigned static values, the assigned next values, the first error function, and the second error function.

Determination of single-fix rectification function

A method for modeling a circuit design includes synthesizing the circuit design to create a first gate-level representation of the circuit design. The method also includes analyzing a second gate-level representation of the circuit design to learn architecture information, and resynthesizing the first gate-level representation of the circuit design to incorporate the learned architecture information from the second gate-level representation of the circuit design. A computer-readable storage medium has stored thereon computer instructions that, when executed by a computer, cause the computer to synthesize a circuit design to create a first gate-level representation of the circuit design. The computer instructions also cause the computer to analyze a second gate-level representation of the circuit design to learn architecture information, and resynthesize the first gate-level representation of the circuit design to incorporate the learned architecture information from the second gate-level representation of the circuit design.

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Fremont, CA, United States of America

Yifeng Wang