Oracle International Corporation

Yifan YangGong

Sebastian Turullols

Changku Hwang

Daniel S Woo

Lin Zhang

Qing Xie

Georgios K Konstadinidis

Ha Pham

Venkatram Krishnaswamy

Vijay Srinivasan

Nicolas M Huynh

Yufei Qian

A power management controller is disclosed. Broadly speaking, the controller may, in response to receiving a timing signal, monitor a temperature of an integrated circuit including multiple processor clusters. The controller may generate a comparison of the temperature and a threshold value, and in response to a determination that the comparison indicates that the temperature is less than the threshold value, transition a particular processor cluster to a new power state.

Temperature based frequency throttling

A method for determining power dissipation within a computer system is disclosed. A circuit block may receive a regulated voltage level on a power supply signal generated by a voltage regulator circuit. A power control circuit may measure a current drawn by the circuit block, and determine a real-time voltage level for the power supply signal using the current and based on a slope value and a zero-load voltage level. Additionally, power control circuit may determine a power dissipation for the circuit block using the current and the real-time voltage level, and adjust an operation parameter of the circuit block based on the power dissipation.

Load line compensation in power monitoring

A method for adjusting operation parameters of a computer system based on power consumption of the computer system is disclosed. During a power state transition of the computer system, a voltage level of a power supply signal may be sampled at a plurality of time points to generate a multiple voltage level samples. A voltage level of a selected one of the multiple voltage level samples may be adjusted using a particular coefficient of multiple coefficients to generate an updated voltage level sample. A power consumption of the computer system may be determined using the updated voltage level sample, and based on the power consumption, at least one operation parameter of the computer system may be adjusted.

Current compensation during dynamic voltage and frequency scaling transitions

A method and apparatus for calibrating a temperature sensor is disclosed. In one embodiment, a method comprises generating first and second digital values based respectively on first and second voltages applied to a portion of a temperature sensor circuit. An arithmetic circuit may derive the value of the second voltage based on the first and second digital values. The method further comprises determining an initial value of a constant based on values of the first and second voltages, and determining a final value of the constant based on the initial voltage and at least one voltage offset. The constant may then be used in determining temperature readings for the temperature sensor.

Statistical temperature sensor calibration apparatus and methodology

A power management controller is disclosed. Broadly speaking, the controller may, in response to detecting a timing signal, determine a total power consumption for a plurality of processor clusters, each of which includes a plurality of processor cores. The controller may determine a performance metric using the total power consumption and compare the performance metric to a limit. Based on a result of the comparison, the controller may select a new power state for at least one of the processor clusters.

Power management in an integrated circuit

An apparatus is disclosed, including a monitoring circuit, a translation circuit, a first filter circuit, a second filter circuit, and an interface. The monitoring circuit may be configured to receive a plurality of code values indicative of a voltage level of a power supply signal. The translation circuit may be configured to translate a particular code value to a corresponding voltage value of a plurality of voltage values. The first filter circuit may be configured to filter one or more of the plurality of voltage values to generate a plurality of filtered voltage values. The second filter circuit may be configured to generate a plurality of current values using one or more of the plurality of filtered voltage values and based on an impulse response of the power supply signal. The interface may be configured to send one or more of the plurality of current values to a functional circuit.

Integrated circuit current metering using voltage variation detection circuit

A system that generates a click signal includes a first digitally controlled oscillator (DCO) having a first fundamental frequency, and a second DCO having a second fundamental frequency. The system also includes a Muller C-element, which combines outputs of the first and second DCOs to produce the clock signal, which feeds back into the first and second DCOs. During a calibration operation, while the second DCO is set to a frequency larger than the target frequency, the system adjusts the first DCO with reference to a first feedback loop, which includes the first DCO, so that the clock signal matches the target frequency, and while the first DCO is set to the adjusted first fundamental frequency plus a frequency offset, the system adjusts the second DCO with reference to a second feedback loop, which includes the second DCO, so that the clock signal matches the target frequency.

Asymmetric locking technique for asymmetric frequency locked loop

A system includes a power management unit that may monitor the power consumed by a processor including a plurality of processor core. The power management unit may throttle or reduce the operating frequency of the processor cores by applying a number of throttle events in response to determining that the plurality of cores is operating above a predetermined power threshold during a given monitoring cycle. The number of throttle events may be based upon a relative priority of each of the plurality of processor cores to one another and an amount that the processor is operating above the predetermined power threshold. The number of throttle events may correspond to a portion of a total number of throttle events, and which may be dynamically determined during operation based upon a proportionality constant and the difference between the total power consumed by the processor and a predetermined power threshold.

System and method for managing power in a chip multiprocessor using a proportional feedback mechanism

In an integrated circuit that provides a clock signal, an asymmetric frequency-locked loop (AFLL) includes a first digitally controlled oscillator (DCO) that outputs a first signal having a first fundamental frequency, and a second DCO that outputs a second signal having a second fundamental frequency. The integrated circuit includes a voltage regulator that provides a power-supply voltage to the second DCO. Moreover, the AFLL includes control logic that selects one of the first DCO and the second DCO based on an instantaneous value of a power-supply voltage and an average power-supply voltage. Furthermore, the AFLL adjusts a gain of the selected DCO in the first sub-frequency-locked loop based on the instantaneous value of the power-supply voltage and the average power-supply voltage. In this way, an impact of power-supply voltage variations on a time-critical path in the integrated circuit is reduced.

AFLL with increased timing margin

In an integrated circuit that provides a clock signal, an asymmetric frequency-locked loop (AFLL) includes a first digitally controlled oscillator (DCO) that outputs a first signal having a first fundamental frequency, and a second DCO that outputs a second signal having a second fundamental frequency that is less than the first fundamental frequency. Moreover, the AFLL includes control logic that selects one of the first DCO and the second DCO based on an instantaneous value of a power-supply voltage and an average power-supply voltage so that an impact of power-supply voltage variations on a time-critical path in the integrated circuit is reduced. For example, the control logic may select the first DCO if the instantaneous value of the power-supply voltage is greater than the average power-supply voltage; otherwise, the control logic may select the second DCO.

Growing community of inventors

Milpitas, CA, United States of America

Yifan YangGong