Ubiq Semiconductor Corp.

Upl Semiconductor Corp.

Yi-Yun Tsai

Chin-Fu Chen

Chih-Hung Chen

Yuan-Shun Chang

Kao-Way Tu

Provided is a power transistor device including a substrate, a first electrode, and a second electrode. The substrate has an active region and a terminal region. The terminal region surrounds the active region. The substrate includes a first trench and a second trench. The first trench is disposed within the active region and adjacent to the terminal region. The second trench is disposed within the terminal region and adjacent to the active region. The first electrode and the second electrode are respectively disposed in the first trench and the second trench. The first electrode and the second electrode both are electrically floating.

Power transistor device

A semiconductor apparatus including a substrate, an electrostatic discharge protection device, a resistor device, and a first metal layer is provided. The substrate defines a pad area and includes a first area and a second area. The first area has a recess, the second area is disposed in the recess, and the pad area is partially overlapped with the first area and the second area. The electrostatic discharge protection device is disposed in the first area of the substrate. The resistor device is disposed in the second area of the substrate. The first metal layer is disposed above and electrically connected to the electrostatic discharge protection device and the resistor device.

Semiconductor apparatus

Provided is a trench gate MOSFET including a substrate of a first conductivity type, an epitaxial layer of the first conductivity type, a first conductive layer of a second conductivity type, a second conductive layer and an interlayer insulating layer. The epitaxial layer is disposed on the substrate and has at least one trench therein. The first conductive layer is disposed in the lower portion of the trench and in physical contact with the epitaxial layer. The second conductive layer is disposed in the upper portion of the trench. The interlayer insulating layer is disposed between the first conductive layer and the second conductive layer.

Trench gate MOSFET

A semiconductor structure including a substrate, a first dielectric layer, a first conductive layer, a positioning part, two spacers, and a second conductive layer is provided. The substrate has a first trench. The first dielectric layer is disposed on a surface of the first trench. The first conductive layer is filled in the first trench and located on the first dielectric layer. The positioning part is disposed on the substrate and has a first opening. The first opening exposes the first trench. The spacers are disposed on two sidewalls of the first opening and expose the first conductive layer. The second conductive layer is filled in the first opening and electrically connected to the first conductive layer. The semiconductor structure can prevent the generation of leakage current while maintaining a high breakdown voltage.

Semiconductor structure and manufacturing method thereof and terminal area structure of semiconductor device

A power semiconductor device of stripe cell geometry including a substrate, a plurality of striped power semiconductor units, and a guard ring structure is provided. The substrate has an active area and a termination area surrounding the active area defined thereon. The striped semiconductor unit includes a striped gate conductive structure. The striped semiconductor units are located in the active area. The guard ring structure is located in the termination area and includes at least a ring-shaped conductive structure surrounding the striped power semiconductor units. The ring-shaped conductive structure and the striped gate conductive structures are formed on the same conductive layer, and at least one of the striped gate conductive structures is separated from the nearby ring-shaped conductive structure and electrically connected to the nearby ring-shaped conductive structure through the gate metal pad.

Growing community of inventors

Hsinchu County, Taiwan

Yi-Yun Tsai