United Microelectronics Corp.

United Microdisplay Optronics Corp.

Yi-Tyng Wu

Huai-Hsuan Tsai

Shih-Hung Chen

Chih-Sheng Chang

Hsuan-Hsu Chen

Kuo-Chi Lin

Chi-Rong Lin

Chien-hua Tsai

Chih-Hung Cheng

Chun-Hsing Tung

Kuan-Hsiung Wang

Nien-Chung Chiang

Fu-Kuo Ou

Lu-Yang Kao

A method for fabricating a patterned dichroic film is provided, wherein the method comprises steps as follows: A patterned material layer comprising at least one inorganic layer is firstly provided on a substrate. A film deposition process is then performed to form a dichroic film on the patterned material layer and the substrate. The patterned material layer is subsequently removed, whereby a portion of the dichroic film disposed on the patterned material layer can be removed simultaneously.

Method for fabricating patterned dichroic film

An optically controlled read only memory is disclosed. The optically controlled read only memory includes a substrate, a plurality of memory cells having optical sensors disposed on the substrate, and at least one shielding structure disposed on the optical sensor, in which the shielding structure selectively shields a portion of the optical sensor according to a predetermined layout. Preferably, the optically controlled read only memory of the present invention is capable of providing two types or more program codes and outputting different program codes carrying different function under different lighting condition.

Optically controlled read only memory

A liquid crystal on silicon (LCoS) cell structure includes a substrate, a plurality of top metal regions arranged in an array, a dielectric material filling between the top metal regions and a composite post spacer disposed on the dielectric material and encircling to form a cell space. The composite post spacer includes a first dielectric layer disposed on the dielectric material and a spacer material layer disposed on the first dielectric layer. The spacer material layer and the first dielectric layer are substantially different.

LCoS cell strucutre

An image device includes a substrate having a die region defined thereon, a layout pattern positioned in the die region, and a color filter array including a plurality of color filters arranged in a matrix in the die region. The die region includes at least a die corner. The color filter array further includes at least a color filter array corner, and at least two apexes of the color filters arranged in the color filter array corner are separated from the corresponding layout pattern by a shortest distance.

Image device having color filter array

A liquid crystal on silicon (LCoS) panel is disclosed. The LCoS panel includes: a substrate having at least one metal-oxide semiconductor (MOS) transistor thereon; a pixel electrode array disposed on the substrate; a plurality of color filters with at least two different colors disposed on the pixel electrode array, wherein adjacent color filters comprise a gap therebetween and at least two of the color filters are not coplanar; an inorganic film disposed on the color filters and within the gap; and an organic film covering the inorganic film entirely.

Color filter device and method for fabricating the same

A method of improving the flatness of a microdisplay surface is disclosed. A reflective mirror layer and a raised layer are formed in order on substrate. The raised layer may comprise a buffer layer and a stop layer, and pixel electrode areas are defined therefrom and gaps are consequently formed among the pixel electrode areas. A dielectric layer is deposited on the pixel electrode areas and fills the gaps. A dielectric layer is partially removed such that the portion on the raised layer is completely removed and the portion filling the gaps are partially removed, thereby the remaining dielectric layer in the gaps has a height not lower than the top of the mirror layer. Thereafter, the raised layer is entirely or partially removed. A transparent conductive layer may be further combined onto the semiconductor substrate and a liquid crystal filling process is performed to form an LCoS display panel.

Method of improving the flatness of a microdisplay surface and method of manufacturing liquid crystal on silicon (LCOS) display panel the same

A process for fabricating a micro-display is provided. First, a wafer having a driving circuit thereon is provided. Then, a metallic reflective layer is formed on the wafer. Thereafter, an anti-reflection layer and a patterned photoresist layer are sequentially formed on the metallic reflective layer. Using the patterned photoresist layer as an etching mask, the anti-reflection layer and the metallic reflective layer are etched to form a trench pattern that exposes the surface of the wafer. After that, the patterned photoresist layer is removed. A dielectric layer is formed to cover the anti-reflection layer and fill the trench pattern. Then, a portion of the dielectric layer and the anti-reflection layer are removed to expose the surface of the metallic reflective layer.

Process for fabricating micro-display

A method of improving the flatness of a microdisplay surface. A reflective mirror layer and a raised layer are formed in order on a semiconductor substrate. The raised layer may comprise a buffer layer and a stop layer, and pixel electrode areas are defined therefrom and gaps are consequently formed among the pixel electrode areas. A dielectric layer is deposited on the pixel electrode areas and fills the gaps. A dielectric layer is partially removed such that the portion on the raised layer is completely removed and the portion filling the gaps are partially removed, thereby the remaining dielectric layer in the gaps has a height not lower than the top of the mirror layer. Thereafter, the raised layer is entirely or partially removed. A transparent conductive layer may be further combined onto the semiconductor substrate and a liquid crystal filling process is performed to form an LCoS display panel.

Method of improving the flatness of a microdisplay surface, liquid crystal on silicon (LCoS) display panel and method of manufacturing the same

A process of physical vapor depositing mirror layer with improved reflectivity is disclosed. A wafer is loaded into a PVD tool comprising a degas chamber, a Ti/TiN sputter deposition chamber, a cooling chamber, and an aluminum sputter deposition chamber. A wafer degas process is first performed within the degas chamber. The wafer is then transferred to the Ti/TiN sputter deposition chamber and deposition sputtering a layer of titanium onto the wafer. The wafer is transferred to the cooling chamber and gas cooling the wafer temperature down to 40-50&#xb0; C. The wafer is then transferred to the aluminum sputter deposition chamber and deposition sputtering a layer of aluminum onto the wafer at 40-50&#xb0; C. with a backside gas turned off. The deposited layer of aluminum over the wafer has a reflectivity of about 0.925 at wavelength of around 380 nm.

Process of physical vapor depositing mirror layer with improved reflectivity

A method of manufacturing a dichroic filter array is provided and comprises forming a first dichroic filter material layer on a substrate, and then forming a patterned photoresist layer on the first dichroic filter material layer. The exposed portion of the first dichroic filter material layer is removed so as to form a plurality of first dichroic filter units. A second dichroic filter material layer is formed on the substrate and the patterned photoresist layer. The patterned photoresist layer and the second dichroic filter material layer located on the patterned photoresist layer are removed, and the second dichroic filter material layer between the first dichroic filter units are transformed into a plurality of second dichroic filter units. By using etching process and the lift-off process to simultaneously remove redundant dichroic filter material and the photoreisit layer, the multi-chroic filter array device with a relatively small volume can be rapidly produced.

Method of manufacturing dichroic filter array

A method of fabricating a color filter is provided, which includes the following steps. First, a loose composite film is formed. Next, the loose composite film is patterned to form a patterned composite film. Then, a treatment process is performed to dense the patterned composite film, thereby a color filter is formed.

Method of fabricating color filter

The present invention discloses a method for fabricating a buried bit line of a mask ROM. The method includes providing a semiconductor substrate with a photoresist layer, and patterning the photoresist layer to form a photoresist pattern. A first ion implantation process is performed to form a first doped region in the semiconductor substrate not covered by the photoresist pattern. Then, an organic layer is coated on the photoresist pattern and the semiconductor substrate and an etching process is performed to form an organic spacer at two sides of the photoresist pattern. Finally, a second ion implantation process forms a second doped region in the semiconductor substrate not covered by the photoresist pattern and the organic spacer. Finally, the photoresist pattern and the organic spacer are removed.

Method for fabricating a mask ROM

A method of fabricating a bottom electrode is provided. A dielectric layer comprising a first opening is formed on the substrate. A conductive layer is formed on the dielectric layer to fill the first opening. A first patterned mask layer comprising a second opening is formed on the conductive layer. An isotropic etching step is performed on the conductive layer with the first patterned mask layer serving as a mask. A recess with a non-vertical sidewall is formed on the conductive layer under the second opening. The first patterned mask layer is removed. The conductive layer is patterned to form a bottom electrode with the recess. A hemispherical grained silicon layer is formed on the bottom electrode.

Method of fabricating bottom electrode

A method for fabricating a bottom electrode is provided. In this method a dielectric layer is formed on a substrate having a source/drain region. A via hole is formed in the dielectric layer to expose the source/drain region. A patterned, doped polysilicon layer is formed on the dielectric layer and fills the via hole, wherein the cross-section of the patterned doped polysilicon layer is arced or polygonal. The surface of the patterned polysilicon layer is transformed into an amorphous silicon layer. A hemispherical-grain layer is formed on the amorphous silicon layer.

Method to form bottom electrode of capacitor

The present invention relates to a method of making a load resistor of a static random access memory on a dielectric layer of a semiconductor wafer. This method comprises depositing a poly-silicon layer on the dielectric layer, depositing a silicon-oxy-nitride (SiO.sub.X N.sub.Y) layer on the poly-silicon layer, performing a photolithographic process to define an area for making the load resistor, and performing an etching process to remove the silicon-oxy-nitride layer and the poly-silicon layer in all areas except for the area of the load resistor so as to form the load resistor. The poly-silicon layer of the load resistor is used as a conductive resistance layer, and the silicon-oxy-nitride layer of the load resistor is used as a radiation insulating layer for preventing radiation damages of the load resistor caused by plasma radiation in plasma processes to be performed later on.

Growing community of inventors

Chia-I, Taiwan

Yi-Tyng Wu