Taiwan Semiconductor Manufacturing Comp. Ltd.

Mars Semiconductor Corp.

Yi-Shing Chang

Wen-Ting Chu

Chia-Shiung Tsai

Yeur-Luen Tu

Kuo-Chi Tu

Shou-Gwo Wuu

Ho-Ching Chien

Yi-Jiun Lin

Ming Liang Chung

Dunn-Nian Yaung

Luen-Shen Yuan

Tsung-Ming Ho

A system on chip (SOC) module has a first SOC for audio data transmission, and the first SOC has an audio data input/output (I/O) interface unit, a processing unit and a serial peripheral interface (SPI) unit. The audio data I/O interface unit is electrically connected to multiple audio input devices so as to receive multiple pieces of first audio data generated by the multiple audio input devices. The processing unit is used to store the multiple pieces of the first audio data. The SPI unit is electrically connected to a second SOC via a first SPI, so as to transmit the multiple pieces of the first audio data to the second SPI.

SOC module for audio data transmission and audio transmission system

A wireless data transmitting system having a wireless data receiving device and a plurality of wireless data transmitting devices is disclosed. Each of the wireless data transmitting devices transmits data at every a specific period if no collision is detected during data transmission, and if a collision is detected during data transmission, the wireless data transmitting device decides a back-off delay time and transmits data after the back-off delay time has elapsed. The back-off delay time of the wireless data transmitting device is a multiplication of a unit slot time of the wireless data transmitting device transmitting at least one data packet, by k, wherein k is an integer equal to or larger than 1 and is randomly decided by a probability distribution model of the wireless data transmitting device.

Wireless data transmitting device, wireless data transmitting system, and wireless data transmitting method

A data conversion circuit for converting black-and-white or grayscale frames for a color display panel/module, and an electronic device and a color display device using the data conversion circuit are disclosed. The data conversion circuit includes a data conversion unit for receiving an input data of the black-and-white or grayscale frame provided by a controller/MCU. The data conversion unit converts the input data into a color frame data for the color display panel/module, and no input clock or reference clock for adjusting an output rate of the color frame data is received or generated by the data conversion circuit.

Data conversion circuit for converting black-and-white or grayscale frames for color display panel/ module, and electronic device and color display device using the same

A wireless transmission system capable of automatically adjusting transmission power includes a main wireless apparatus and plural secondary wireless apparatuses, and the main wireless apparatus is capable of detecting the data rate between the secondary wireless apparatuses, and increasing or decreasing the transmission power of any one of the secondary wireless apparatuses by a master controller, or increasing or decreasing the transmission power of the main wireless apparatus, so that the data rate and/or transmitting distance between the main wireless apparatus and the secondary wireless apparatuses can be optimized.

Wireless transmission system capable of automatically adjusting transmission power

A method for forming an improved etching hardmask oxide layer in a polysilicon etching process including providing a planarized semiconductor wafer process surface including adjacent first exposed polysilicon portions and exposed oxide portions; selectively etching through a thickness portion of the exposed oxide portions; thermally growing an oxide hardmask layer over the exposed polysilicon portions to form oxide hardmask portions; exposing second exposed polysilicon portions adjacent at least one oxide hardmask portion; and, etching through a thickness portion of the second exposed polysilicon portions.

Flash memory devices with box shaped polygate structures

A memory device and the method for manufacturing same is disclosed. The device comprises a first oxide layer on top of a substrate, a floating gate layer on top of the first oxide layer, a second oxide layer over the floating gate layer, wherein the second oxide layer and the floating gate layer have a first opening and a second opening respectively, and wherein the width of second opening is bigger than the width of the narrowest region of the first opening so that the floating gate layer is pulled back horizontally underneath the second oxide layer. A source region is in the substrate underneath the first oxide layer, and a third oxide layer fills in the first and second openings conforming to the contour thereof, wherein the third oxide has a third opening to reach a portion of the source region. Further, a control gate material fills in the third opening.

Method and system for forming source regions in memory devices

Each of an elevated diode sensor optoelectronic product and a method for fabricating the elevated diode sensor optoelectronic product employs a sidewall passivation dielectric layer passivating a sidewall of a patterned conductor layer which serves as a bottom electrode for an elevated diode within the elevated diode sensor optoelectronic product. The sidewall passivation dielectric layer eliminates contact between the patterned conductor layer and an intrinsic diode material layer within the elevated diode, thus providing enhanced performance of the elevated diode sensor optoelectronic product.

Sensor element having elevated diode with sidewall passivated bottom electrode

A split gate flash memory cell structure is disclosed for prevention of reverse tunneling. A gate insulator layer is formed over a semiconductor surface and a floating gate is disposed over the gate insulator layer. A floating gate insulator layer is disposed over the floating gate and sidewall insulator spacers are disposed along bottom portions of the floating gate sidewall adjacent to said gate insulator layer. The sidewall insulator spacers are formed from a spacer insulator layer that had been deposited in a manner that constitutes a minimal expenditure of an available thermal budget and etching processes used in fashioning the sidewall insulator spacers etch the spacer insulator layer faster than the gate insulator layer and the floating gate insulator layer. An intergate insulator layer is disposed over exposed portions of the gate insulator layer, the floating gate, the floating gate insulator layer and the sidewall insulator spacers. A conductive control gate is disposed over the intergate insulator layer, covering about half of the floating gate.

Space process to prevent the reverse tunneling in split gate flash

A memory device and the method for manufacturing the same is disclosed. The device includes a first oxide layer on top of a substrate, a floating gate layer on top of the first oxide layer, and a second oxide layer over the floating gate layer. The second oxide layer and the floating gate layer have a first opening and a second opening respectively wherein the width of second opening is bigger than the width of the narrowest region of the first opening so that the floating gate layer is pulled back horizontally underneath the second oxide layer. A source region is in the substrate underneath the first oxide layer, and a third oxide layer fills in the first and second openings conforming to the contour thereof. The third oxide has a third opening to reach a portion of the source region. Further, a control gate material fills in the third opening.

Growing community of inventors

Hsinchu, Taiwan

Yi-Shing Chang