Taiwan Semiconductor Manufacturing Comp. Ltd.

Yi-Rui Chen

Yee-Chia Yeo

Huicheng Chang

Sen-Hong Syue

Cheng-I Chu

Keng-Chu Lin

Szu-Ying Chen

Yu-Yun Peng

Hsu-Kai Chang

Chen-Hao Wu

Yi-Fan Chen

Wen-Kai Lin

Chen-Fong Tsai

Han-De Chen

Li-Chi Yu

Kenichi Sano

Huang-Lin Chao

Yu-Wei Lu

Yoh-Rong Liu

Kuei-Lin Chan

Wei-Ting Yeh

Zheng-Yong Liang

Chia-Yun Cheng

A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate, the first bonding layer including a first bonding sub-layer and a second bonding sub-layer, the first bonding sub-layer including a first metal oxide material in an amorphous state and a plurality of metal nanoparticles, the second bonding sub-layer including a second metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, the second bonding layer including a third metal oxide material in an amorphous state; conducting a surface modification process on the first and second bonding layers; bonding the device and carrier substrates to each other through the first and second bonding layers; and annealing the first and second bonding layers to convert the first, second, and third metal oxide materials from the amorphous state to a crystalline state.

Metal nanoparticles in an amorphous bonding layer between a device substrate and carrier substrate

A method of forming a semiconductor device includes forming a sacrificial gate structure over a substrate, depositing a spacer layer on the sacrificial gate structure in a conformal manner, performing a multi-step oxidation process to the spacer layer, etching the spacer layer to form gate sidewall spacers on opposite sidewalls of the sacrificial gate structure, removing the sacrificial gate structure to form a trench between the gate sidewalls spacers, and forming a metal gate structure in the trench.

Gate spacer and formation method thereof

Embodiments include nanostructure devices and methods of forming nanostructure devices which include a treatment process to expand a sidewall spacer material to close a seam in the sidewall spacer material after deposition. The treatment process includes oxidation anneal and heat anneal to expand the sidewall spacer material and crosslink the open seam to form a closed seam, lower k-value, and decrease density.

Method of forming a nano-FET semiconductor device

Growing community of inventors

Hsinchu, Taiwan

Yi-Rui Chen