National Yang Ming Chiao Tung University

Lite-On It Corporation

Phoenixtec Power Co., Ltd.

Unihan Corporation

Yi-Min Lin

Hsie-Chia Chang

Chen-Yi Lee

Chi-Heng Yang

Tzu-Nan Chen

Chih-Hsiang Hsu

Chia-Ching Chu

Sheng-Hung Lin

Chao-Tung Fan Chiang

Li-Yang Lin

A memory system, a fully parallel encoding method, and a fully parallel decoding method are disclosed. The encoding method utilizes a plurality of minimal polynomials that constitute a generator polynomial to derive a plurality of roots from the minimal polynomials. A first encoding matrix derived according to the roots of the minimal polynomials is subsequently decomposed to derive a second encoding matrix, in which partial elements of the second encoding matrix are common in those of a parity check matrix of the decoder, such that the encoder and the decoder can efficiently share the same hardware. In addition, the decoding method defines a new error locator polynomial and utilizes a cubic matrix operation to respectively combine the equations, which reduces the hardware required by the fully parallel architecture.

Fully parallel encoding method and fully parallel decoding method of memory system

In a cyclic code decoding method, a decoder analyzes a received codeword to identify unreliable symbols in the codeword, and sets candidate syndrome patterns accordingly. Then, a syndrome calculator calculates evaluated syndrome values associated with one of the candidate syndrome patterns, and an error location polynomial (ELP) generator generates an ELP according to the syndrome values. An error correction device corrects the errors in the codeword according to the ELP when a degree of the ELP is not more than a threshold value, and the syndrome calculator adjusts the syndrome values and the ELP generator generates another ELP according to the adjusted syndrome values when otherwise.

Cyclic code decoding method and cyclic code decoder

An apparatus of processing polynomials includes at least one reconfigurable module and an encoder controller. The reconfigurable module includes a plurality of linear feedback shift registers. The encoder controller can control the reconfigurable module to factor a generator polynomial into a factorial polynomial. In the reconfigurable module, the linear feedback shift registers can register a plurality of factors of the factorial polynomial respectively.

Apparatus and method of processing polynomials

A power device includes a power supply module, a first electrical isolation unit, a second electrical isolation unit, a feedback control unit, and a comparing unit. The power supply module includes a feedback compensating terminal and an output terminal, the feedback compensating terminal provides a related voltage of output power, and the output terminal provides an output voltage. When the related voltage of output power is smaller than the predetermined voltage, the comparing unit controls the first electrical isolation unit to change operation of the feedback control unit and the second electrical isolation unit, to allow the power supply module to adjust the output voltage.

Power device

The present invention discloses an ultrasonic apparatus with an adjustable horn. The ultrasonic apparatus comprises a transmission device, a horn and an ultrasonic transceiver device. The horn and the transmission device are geared by a helical gear. The ultrasonic transceiver device is connected to the end of the helical gear. When the transmission device moves the horn to a first position, the ultrasonic transceiver device is applied for on/off control; while the transmission device moves the horn to a second position, the ultrasonic sensor is applied for digital control.

Ultrasonic apparatus with an adjustable horn

A non-isolated power supply device and a method for controlling the same, wherein only one DC voltage bus is adopted and the neutral lines of the input voltage and output voltage are directly connected together. During the periods that the voltage polarities of the input voltage and output voltage are not the same, the power supply device is operated in a flyback mode to avoid the generation of an abnormal current. Otherwise, during the periods that the voltage polarities of the input voltage and output voltage are the same, the power supply device is operated in a boost mode to derive a superior efficiency.

Growing community of inventors

Taipei, Taiwan

Yi-Min Lin