Silicon Motion, Inc.

Yi-Kang Chang

Jie-Hao Lee

Hsuan-Ping Lin

A non-volatile memory life-extension technology is shown. Based on two values related to the write amplification factor of non-volatile memory, the controller coupled to the non-volatile memory adjusts the execution frequency of the wear-leveling migration performed on the non-volatile memory. By executing the wear-leveling migration, the controller uses the first block, which is a spare block, to store the data of the second block, whose erase count is lower than that of the first block, and then erases and releases the second block for reuse. The frequency adaptation of the execution of wear-leveling migration effectively avoids the exacerbation of write amplification problems.

Data storage device and non-volatile memory control method

An efficient control technology for non-volatile memory is shown. A non-volatile memory provides a storage space that is divided into blocks. When programming the write data issued by the host to the non-volatile memory, the programming order of the blocks is recorded. Garbage collection is based on the recorded programming order. Sequential data can be collected to the destination block in sequence.

A flash memory control technology with high efficiency, which records a logical page table in a random access memory. The logical pages that have been collected from a data-interspersed block into a destination block of a flash memory are recorded in the logical page table. Without accessing a logical-to-physical address mapping table stored in the flash memory, the physical pages in the data-interspersed block corresponding to the logical pages recorded in the logical page table are regarded as containing invalid data.

Improving garbage collection efficiency by reducing page table lookups

A flash memory control technology with power recovery capability, by which command sequence information is generated for write data that is requested to be written into a flash memory. A random access memory is allocated for temporary storage of the write data and the command sequence information. The write data is uploaded from the random access memory onto a run-time write block between physical blocks of the flash memory with the command sequence information corresponding thereto. During a power recovery process of a data storage device that is equipped with the flash memory, the run-time write block is checked and, according to the command sequence information that has been uploaded onto the run-time write block, the write data in the run-time write block and later in a command sequence than lost data is abandoned.

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Taipei, Taiwan

Yi-Kang Chang