United Microelectronics Corp.

Yi-Jing Wang

En-Chiuan Liou

Chia-Hsun Tseng

Che-Yi Lin

Mei-Chen Chen

Chia-Hung Lin

Chun-Chi Yu

Chia-Hung Wang

Yi-Ting Chen

Chia-Ching Lin

Han-Lin Zeng

Yu-Ying Huang

Jen-Hsiu Li

Ya-Ling Chen

Chi-Ming Huang

A method of forming an integrated circuit includes the following steps. A substrate including a plurality of exposure fields is provided, and each of the exposure field includes a target portion and a set of alignment marks. Measure the set of alignment marks of each exposure field by a measuring system to obtain alignment data for the respective exposure field. Determine an exposure parameter corresponding to each exposure field and an exposure location on the target portion from the alignment data for the respective exposure field by a calculating system. Feedback the alignment data to a next substrate.

Method of forming integrated circuit

An overlay mask includes a plurality of first patterns, a plurality of second patterns and a plurality of third patterns. The first patterns are arranged within a first pitch. The second patterns are arranged within a second pitch. A first portion of the third patterns are arranged alternately with the first patterns, within the first pitch, and a second portion of the third patterns are arranged alternately with the second patterns, within the second pitch, and the first pitch is not equal to the second pitch.

Overlay mask

The present invention provides an overlay target. The overlay target includes a plurality of first pattern blocks and a plurality of second pattern blocks. The first pattern blocks and the second patterns blocks are arranged in array by being separated by at least one first gaps stretching along a first direction and at least one second gaps stretching along a second direction. Each first pattern block is composed of a plurality of first stripe patterns stretching along a third direction, and each second pattern block is composed of a plurality of second stripe patterns stretching along a fourth direction. The first direction is orthogonal to the second direction, the third direction and the fourth direction are 45 degrees relative to the first direction.

Overlay target for optically measuring overlay alignment of layers formed on semiconductor wafer

An overlay operation method and an overlay control method are disclosed. A first mark and a second mark are identified on a substrate, wherein the first mark and the second mark are formed by a process in combination with using a photomask. Next, a first measurement is performed to obtain an offset between the first mark and the second mark in a direction. Then, an operation is performed to judge whether the offset is in a range from a pre-determined offset minus a deviation to the pre-determined offset plus the deviation, wherein the pre-determined offset is determined by the photomask.

Overlay operation method and overlay control method

An overlay measurement method includes providing three predetermined patterns, including a first predetermined pattern, a second predetermined pattern and a third predetermined pattern. An inspection process is then performed on said three predetermined patterns, to obtain three image points, including a first image point, a second image point and a third image point respectively. Next, a defining process is performed to define a default position, and a calculating process is performed to obtain a real offset value x=(p&#x2212;q)*(c&#x2212;a)/(a&#x2212;b)+p.

Overlay measurement method

In this disclosure, a mark segmentation method and a method for manufacturing a semiconductor structure applying the same are provided. The mark segmentation method comprises the following steps. First, a plurality of segments having a width Wand separated from each other by a space Sformed on a substrate are identified by a processor. Thereafter, a plurality of marks are set over the segments by the processor. This step comprises: (1) adjusting a width Wof each one of the marks being equal to m(W+S)+Wor m(W+S)+Sby the processor, wherein m is an integer; and (2) adjusting a space Sof adjacent two of the marks by the processor such that WS=n(W+S), wherein n is an integer.

Growing community of inventors

Tainan, Taiwan

Yi-Jing Wang