Taiwan Semiconductor Manufacturing Comp. Ltd.

Epistar Corporation

Industrial Technology Research Institute

National Taiwan University

Tsinghua University

Lite-On Technology Corporation

Bioware Technology Co., Ltd.

Yi-Hung Lin

Tze-Liang Lee

Chii-Horng Li

Chao-Hsing Chen

Jr-Hung Li

Yu-Hung Cheng

Hsin-Ying Wang

Hsin-Hsin Shen

Cheng-Lin Lu

Jui-Sheng Sun

Meng-Hsiang Hong

Ying-Chieh Hung

Kuo-Ching Hung

Ming-Hua Yu

Chih-Chiang Lu

Chih-Hao Chen

Li-Ting Wang

Chih-Chieh Huang

Chi-Shiang Hsu

Shan-Chang Chueh

I-Lun Ma

Pei-Yi Tsai

Chang-Shen Lu

Chung-Li Huang

Tai-Chun Huang

Pang-Yen Tsai

Yen-Ru Lee

Jia-Kuen Wang

Chun-Jen Liao

Tzu-Yao Tseng

Hao-Ming Lien

Lilly Su

Yi-Wen Huang

De-Yau Lin

Ching-Chih Lin

An-Li Chen

Chuan-Sheng Chuang

Yi-Hung Wen

Ya-Jen Yu

Shyh-Shin Ferng

Kun-Mo Lin

I-Fan Chiu

Da-Yuan Lee

Ming-Hsing Tsai

Weng Chang

Chung-Ting Ko

Tzu-Chieh Hsu

Hsueh Wen Tsau

Cheng-Yen Tsai

Ting-Gang Chen

Wei-Che Hsieh

Wu-Tsung Lo

Ching-Chuan Jiang

Jen-Chieh Yu

Shiang-Rung Tsai

Guan-Wu Chen

Ting-Hui Chiu

Chi-Che Tseng

Chen-Yuan Wang

Wilson Hsieh

Brian Wang

JoJo Lee

Chungwei Wang

Syun-Ming Jang Jang

Pei-Ren Jeng

Chih-Tang Peng

Chih-Hung Chen

De-Shan Kuo

Shih-Chang Lee

Victor Y Lu

Chih-Tsung Lee

Yu-Ting Huang

Keith Kuang-Kuo Koai

Tsai-Yu Lin

Jhih-Yong Yang

Wei-En Fu

Yu-Wei Chou

Yang-Hwei Tsuang

Wen-Li Wu

Tzu Chieh Hsu

Hao-Jan Lin

Shian-Yih Wang

Meng-Yow Hsieh

Yu-Chih Yang

Chen-Chi Tsai

Wei-Lin Yu

Shuo-Jen Shieh

Yun-San Chien

Cheng-Hong Chen

Pei-Shan Li

Yu-Shi Weng

Po-Liang Lai

Dongliang Daniel Sheu

Hao Chien

Jet-Rung Chang

Ta-Chuan Kuo

Chih-Hung Chang

Liang-Yin Ke

Sheng-Shin Lin

Chu-Huang Chen

A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active area between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer including an upper surface; an exposed region formed in the semiconductor stack to expose the upper surface; a first protective layer covering the exposed region and a portion of the second semiconductor layer, wherein the first protective layer includes a first part with a first thickness formed on the upper surface and a second part with a second thickness formed on the second semiconductor layer, the first thickness is smaller than the second thickness; a first reflective structure formed on the second semiconductor layer and including one or multiple openings; and a second reflective structure formed on the first reflective structure and electrically connected to the second semiconductor layer through the one or multiple openings.

Light-emitting device and manufacturing method thereof

A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate, and the first semiconductor layer adjacent to the second edge includes a second sidewall separated from the second side surface of the substrate by a distance.

Light-emitting device with a plurality of concave parts on the edge of the semiconductor mesa

An IC fabrication system for facilitating improved thermal uniformity includes a chamber within which an IC process is performed on a substrate, a heating mechanism configured to heat the substrate, and a substrate-retaining device configured to retain the substrate in the chamber. The substrate-retaining device includes a contact surface configured to contact an edge of the retained substrate without the substrate-retaining device contacting a circumferential surface of the retained substrate. The substrate-retaining device includes a plurality of contact regions and a plurality of noncontact regions disposed at a perimeter, where the plurality of noncontact regions is interspersed with the plurality of contact regions. Each of the plurality of noncontact regions includes the contact surface. Alternatively, the substrate-retaining device includes a base portion having a circular surface and a cylindrical surface extending from the circular surface, where a ring portion having the contact surface is disposed within the base portion.

Wafer susceptor with improved thermal characteristics

A system and method for plasma enhanced deposition processes. An exemplary semiconductor manufacturing system includes a susceptor configured to hold a semiconductor wafer and a sector disposed above the susceptor. The sector includes a first plate and an overlying second plate, operable to form a plasma there between. The first plate includes a plurality of holes extending through the first plate, which vary in at least one of diameter and density from a first region of the first plate to a second region of the first plate.

Systems and methods for a plasma enhanced deposition of material on a semiconductor substrate

Light-emitting device with a plurality of electrodes on a semiconductor stack

A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a via penetrating the second semiconductor layer and the active layer to expose a surface of the first semiconductor layer; a first electrode formed in the via and on the second semiconductor layer; a second electrode formed on the second semiconductor layer; and an insulating structure covering the first electrode, the second electrode and the semiconductor structure and including a first opening to expose the first electrode and a second opening to expose the second electrode, wherein the first electrode and the second electrode respectively include a metal layer contacting the insulating layer, the metal layer includes a material including a surface tension value larger than 1500 dyne/cm and a standard reduction potential larger than 0.3 V.

Light-emitting device

An apparatus, a system and a method are disclosed. An exemplary method includes providing a wafer process chamber and a plurality of radiant heat elements under the wafer process chamber, receiving a wafer holder configured to be used in the wafer process chamber, and processing a wafer located on the wafer holder in the wafer process chamber. The wafer holder includes: a wafer contact portion including an upper surface and a lower surface, an exterior portion including an upper surface and a lower surface, and a tapered region formed in the wafer contact portion.

Wafer holder with tapered region

An omni-directional conditioner device includes a carrier that includes a holding part for holding and rotating an object for polishing purpose; a conditioner disposed around the carrier; and a transmission mechanism connected with the carrier on one side and the conditioner on the other side, the transmission mechanism including at least one directional adjustment unit that controls the rotational direction of the conditioner. When the directional adjustment unit is set in one position, the carrier and the conditioner rotate in a same direction, and when the directional adjustment unit is set in another position, the carrier and the conditioner rotate in opposite directions.

Omni-directional conditioner device

A method for ex vivo treating blood or plasma is provided. The method includes (a) ex vivo contacting a blood or plasma with an enzyme composition to react the enzyme composition with the blood or plasma, wherein the enzyme composition is capable of eliminating electronegative low-density lipoprotein from the blood or plasma by the activity of the enzyme composition, and the enzyme composition is selected from a group consisting of: a first enzyme for eliminating a glycan residue of an electronegative low-density lipoprotein (LDL); a second enzyme for eliminating ceramide carried by a electronegative low-density lipoprotein (LDL); and a combination thereof; and (b) terminating contact between the blood or plasma and the enzyme composition to terminate the reaction of the enzyme composition with the blood or plasma.

Method for ex vivo treating blood or plasma

A method includes forming a test key. The formation of the test key includes forming a first plurality of semiconductor strips, and cutting the first plurality of semiconductor strips into an array of a second plurality semiconductor strips, with each row of the array being formed from one strip in the first plurality of semiconductor strips, forming isolation regions in recesses between the second plurality of semiconductor strips, and recessing the isolation regions. The top portions of the second plurality of semiconductor strips protrude higher than the isolation regions form semiconductor fins, which form a fin array. An X-ray beam is projected on the test key. A diffraction pattern is obtained from scattered X-ray beam scattered from the test key.

Test key design to enable X-ray scatterometry measurement

An IC manufacturing method includes forming first mandrels and second mandrels over a substrate; and forming first spacers on sidewalls of the first mandrels and second spacers on sidewalls of the second mandrels. Each of the first and second spacers has a loop structure with two curvy portions connected by two lines. The method further includes removing the first and second mandrels; and removing the curvy portions from each of the first spacers without removing the curvy portions from the second spacers. The second spacers are used for monitoring variations of the IC fabrication processes.

Method and structure for mandrel and spacer patterning

Growing community of inventors

Taipei, Taiwan

Yi-Hung Lin