Taiwan Semiconductor Manufacturing Comp. Ltd.

Yi-Hsiang Chao

Min-Hsiu Hung

Chih-Wei Chang

Huang-Yi Huang

Chih-wei Chang

Hung-Yi Huang

Ming-Hsing Tsai

Yu-Ting Lin

Ching-Hwanq Su

Cheng-Wei Chang

Chien Chang

Chun-Wen Nieh

Kan-Ju Lin

Kao-Feng Lin

Kuan-Yu Yeh

Peng-Hao Hsu

Chun-Hsien Huang

Wei-Jung Lin

Ya-Yi Cheng

Li-Wei Chu

Hung-Hsu Chen

Ching-Yi Chen

Pin-Wen Chen

Hung-Chang Hsu

Yu-Hsiang Liao

Ya-Huei Li

Kai-Chieh Yang

Chang-Ting Chung

Kevin Lee

Chi-Hung Chuang

Shu-Lan Chang

Yu-Chen Ko

Yu-Ting Wen

Chih-Sheng Chou

Pei Shan Chang

Ting-Wei Weng

Shu-Ting Yang

A pre-cleaning technique described herein may be used to remove native oxides and/or other contaminants from a semiconductor device in a manner in which the likelihood of chopping, clipping, and/or sidewall spacer thickness reduction is reduced. As described herein, a protection layer is formed on a capping layer over a gate structure of a transistor. A pre-cleaning operation is then performed to remove native oxides from the top surface of a source/drain region of the transistor. In the pre-cleaning operation, the protection layer is consumed instead of the material of the capping layer. In this way, the use of the protection layer reduces the likelihood of removal of material from the capping layer and/or reduces the amount of material that is removed from the capping layer during the pre-cleaning operation.

Semiconductor device pre-cleaning

A method includes forming a dielectric layer over a source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the source/drain region. A conductive liner is formed on sidewalls and a bottom of the opening. A surface modification process is performed on an exposed surface of the conductive liner. The surface modification process forms a surface coating layer over the conductive liner. The surface coating layer is removed to expose the conductive liner. The conductive liner is removed from the sidewalls of the opening. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with a remaining portion of the conductive liner and the dielectric layer.

Contact features of semiconductor device and method of forming same

A method of forming a semiconductor device includes forming source/drain regions on opposing sides of a gate structure, where the gate structure is over a fin and surrounded by a first dielectric layer; forming openings in the first dielectric layer to expose the source/drain regions; selectively forming silicide regions in the openings on the source/drain regions using a plasma-enhanced chemical vapor deposition (PECVD) process; and filling the openings with an electrically conductive material.

Fin field-effect transistor device and method of forming the same

A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.

The present disclosure relates to a method for fabricating a semiconductor structure. The method includes providing a substrate with a gate structure, an insulating structure over the gate structure, and a S/D region; depositing a titanium silicide layer over the S/D region with a first chemical vapor deposition (CVD) process. The first CVD process includes a first hydrogen gas flow. The method also includes depositing a titanium nitride layer over the insulating structure with a second CVD process. The second CVD process includes a second hydrogen gas flow. The first and second CVD processes are performed in a single reaction chamber and a flow rate of the first hydrogen gas flow is higher than a flow rate of the second hydrogen gas flow.

Selective formation of titanium silicide and titanium nitride by hydrogen gas control

A method for forming a semiconductor device structure is provided. The method includes forming a fin structure over a semiconductor substrate and forming a gate stack over the fin structure. The method also includes forming an epitaxial structure over the fin structure, and the epitaxial structure is adjacent to the gate stack. The method further includes forming a dielectric layer over the epitaxial structure and forming an opening in the dielectric layer to expose the epitaxial structure. In addition, the method includes applying a metal-containing material on the epitaxial structure while the epitaxial structure is heated so that a portion of the epitaxial structure is transformed to form a metal-semiconductor compound region.

Formation method of semiconductor device structure with metal-semiconductor compound region

A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a conductive region made of silicon, germanium or a combination thereof. The semiconductor device structure also includes an insulating layer over the semiconductor substrate and a fill metal material layer in the insulating layer. In addition, the semiconductor device structure includes a nitrogen-containing metal silicide or germanide layer between the conductive region and the fill metal material layers.

Semiconductor device with low resistivity contact structure

A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate including a conductive region made of silicon, germanium or a combination thereof. The method also includes forming an insulating layer over the semiconductor substrate and forming an opening in the insulating layer to expose the conductive region. The method also includes performing a deposition process to form a metal layer over a sidewall and a bottom of the opening, so that a metal silicide or germanide layer is formed on the exposed conductive region by the deposition process. The method also includes performing a first in-situ etching process to etch at least a portion of the metal layer and forming a fill metal material layer in the opening.

Semiconductor device with low resistivity contact structure and method for forming the same

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Taipei, Taiwan

Yi-Hsiang Chao