United Microelectronics Corp.

Genesis Photonics Inc.

YI-Fan Li

Ti-Bin Chen

Yu-Shu Lin

Chih-Chiang Wu

Nien-Ting Ho

Shih-Min Chou

Zhen Wu

Wen-Yen Huang

Li-Wei Feng

Jing-En Huang

Shu-Yen Chan

Ming-Hua Chang

Tien-Chen Chan

Chun-Jen Chen

Sheng-Yuan Sun

Wen-Yi Teng

I-Cheng Hu

Kuo-Chin Hung

Tien-I Wu

Sie-Jhan Wu

Shih-Hung Tsai

Chun-Yuan Wu

Jyh-Shyang Jenq

Yen-Hsing Chen

Kuan-Chieh Huang

Tong-Jyun Huang

Chung-Ting Huang

Chun-Yu Chen

Cheng-Yen Chen

Nan-Yuan Huang

Tung-Lin Chuang

Kun-Hsin Chen

Zih-Hsuan Huang

Han-Min Wu

Yu-Yun Lo

Yun-Li Li

Chih-Ling Wu

Yi-Ru Huang

Neng-Hui Yang

Shao-Ying Ting

Tzu-Chin Wu

Li-Chieh Hsu

Min-Hua Tsai

Po-Ching Su

Yu-Fu Wang

A method for fabricating semiconductor device includes the steps of first providing a substrate having a first region and a second region, forming a first bottom barrier metal (BBM) layer on the first region and the second region, forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region, and then forming a diffusion barrier layer on the first WFM layer.

Semiconductor device and method for fabricating the same

A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.

A first gate and a second gate are formed on a substrate with a gap between the first and second gates. The first gate has a first sidewall. The second gate has a second sidewall directly facing the first sidewall. A first sidewall spacer is disposed on the first sidewall. A second sidewall spacer is disposed on the second sidewall. A contact etch stop layer is deposited on the first and second gates and on the first and second sidewall spacers. The contact etch stop layer is subjected to a tilt-angle plasma etching process to trim a corner portion of the contact etch stop layer. An inter-layer dielectric layer is then deposited on the contact etch stop layer and into the gap.

Method for fabricating semiconductor structure

A semiconductor device includes a substrate having a first region and a second region and a gate structure on the first region and the second region of the substrate. The gate structure includes a first bottom barrier metal (BBM) layer on the first region and the second region, a first work function metal (WFM) layer on the first region; and a diffusion barrier layer on a top surface and a sidewall of the first WFM layer on the first region and the first BBM layer on the second region. Preferably, a thickness of the first BBM layer on the second region is less than a thickness of the first BBM layer on the first region.

A first dummy gate and a second dummy gate are formed on a substrate with a gap between the first and second dummy gates. The first dummy gate has a first sidewall. The second dummy gate has a second sidewall directly facing the first sidewall. A first sidewall spacer is disposed on the first sidewall. A second sidewall spacer is disposed on the second sidewall. A contact etch stop layer is deposited on the first and second dummy gates and on the first and second sidewall spacers. The contact etch stop layer is subjected to a tilt-angle plasma etching process to trim a corner portion of the contact etch stop layer. An inter-layer dielectric layer is then deposited on the contact etch stop layer and into the gap.

A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first bottom barrier metal (BBM) layer on the first region and the second region; forming a first work function metal layer on the first BBM layer on the first region and the second region; removing the first work function metal (WFM) layer and part of the first BBM layer on the second region; and forming a diffusion barrier layer on the first WFM layer on the first region and the first BBM layer on the second region.

A semiconductor structure is disclosed. The semiconductor structure includes first and second metal gates on a substrate with a gap therebetween. The first metal gate has a first sidewall, and the second metal gate has a second sidewall directly facing the first sidewall. A contact etch stop layer (CESL) is disposed within the gap and extends along the first and second sidewalls. The CESL has a first top portion adjacent to a top surface of the first metal gate and a second top portion adjacent to a top surface of the second metal gate. The first top portion and the second top portion have a trapezoid cross-sectional profile. A first sidewall spacer is disposed on the first sidewall and between the CESL and the first metal gate. A second sidewall spacer is disposed on the second sidewall and between the CESL and the second metal gate.

Semiconductor structure and method for fabricating the same

A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; forming a liner on the fin-shaped structure; and removing the liner and part of the fin-shaped structure so that a sidewall of the fin-shaped structure comprises a curve. Moreover, the method includes forming an epitaxial layer around the sidewall of the fin-shaped structure while a top surface of the fin-shaped structure is exposed.

Method for fabricating a curve on sidewalls of a fin-shaped structure

A semiconductor device preferably includes a substrate, a fin-shaped structure on the substrate, a buffer layer on the fin-shaped structure, and an epitaxial layer on the buffer layer. Preferably, the buffer layer is made of silicon germanium and including three or more than three elements. The buffer layer also includes dopants selected from the group consisting of P, As, Sb, Bi, C, and F.

A semiconductor device includes: a fin-shaped structure on a substrate, in which a sidewall of the fin-shaped structure comprises a curve. Specifically, the fin-shaped structure includes a top portion and a bottom portion, a shallow trench isolation (STI) around the bottom portion of the fin-shaped structure, and the curve includes a planar portion extending from the top surface of fin-shaped structure downward and a curved portion extending from the bottom surface of the fin-shaped structure upward.

A thin-film flip-chip light emitting diode (LED) having a roughened surface and a method for manufacturing the same are provided. First, a substrate having a patterned structure on a surface of the substrate is provided, and the surface is roughened. A first semiconductor layer is then formed on the surface; a light emitting structure layer is then formed on the first semiconductor layer; a second semiconductor layer is then formed on the light emitting structure layer. The first and second semiconductor layers possess opposite electrical characteristics. A first contact electrode and a second contact electrode are then formed on the first semiconductor layer and the second semiconductor layer, respectively. Finally, a sub-mount is formed on the first and second contact electrodes, and the substrate is removed to form the thin-film flip-chip LED having the roughened surface. Here, the light emitting efficiency of the thin-film flip-chip LED is improved.

Thin-film flip-chip light emitting diode having roughening surface and method for manufacturing the same

A method for fabricating semiconductor device is disclosed. First, a fin-shaped structure is formed on a substrate, a first liner is formed on the substrate and the fin-shaped structure, a second liner is formed on the first liner, part of the second liner and part of the first liner are removed to expose a top surface of the fin-shaped structure, part of the first liner between the fin-shaped structure and the second liner is removed to form a recess, and an epitaxial layer is formed in the recess.

Semiconductor device having reverse U-shaped epitaxial layer and method for fabricating the same

A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30.

Semiconductor device having silicon-germanium layer on fin and method for manufacturing the same

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Tainan, Taiwan

YI-Fan Li