Uniflex Technology Inc.

National Taiwan University

Unimicron Technology Corporation

Taiwan Semiconductor Manufacturing Comp. Ltd.

Paragon Semiconductor Lighting Technology Co., Ltd.

Yi-Chun Liu

Yuan-Chih Lee

Meng-Huan Chia

Ying-Hsing Chen

Cheng-I Tu

Hsin-Ching Su

Cheng-Chung Lai

Chee-Wee Liu

Tsung-Yuan Chen

Shu-Sheng Chiang

Fang-Liang Lu

Wei-Ming Cheng

Chung-En Tsai

Chia-Che Chung

Yu-Shiang Huang

Hung-Yu Yeh

Chien-Te Tu

Pei-Hao Hung

Chia-Tin Chung

Pei-Chun Liu

Min-Ming Tsai

Shan-Yi Tseng

Chiu-Pei Huang

Pung-Ling Huang

Yi-Yin Do

Wei-Fen Huang

Bo-Hua Chen

Hung-Tai Ting

Wen-Chien Hsu

The present disclosure provides a semiconductor device with a plurality of semiconductor channel layers. The semiconductor channel layers include a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer. A strain in the second semiconductor layer is different from a strain in the first semiconductor layer. A gate is disposed over the plurality of semiconductor channel layers.

Gate-all-around transistor with strained channels

A first and second patterned circuit layer are formed on a first surface and a second surface of a base material. A first adhesive layer is formed on the first patterned circuit layer. A portion of the first surface is exposed by the first patterned circuit layer. The metal reflection layer covers the first insulation layer and a reflectance thereof is greater than or equal to 85%, there is no conductive material between the first patterned circuit layer and the metal reflection layer, and the first adhesive layer is disposed between the first patterned circuit layer and the first insulation layer. A transparent adhesive layer and a protection layer are formed on the metal reflection layer. The transparent adhesive layer is disposed between the metal reflection layer and the protection layer. The protection layer comprises a transparent polymer. The light transmittance is greater than or equal to 80%.

Method of fabricating a substrate with metal reflection layer

A base material is provided. A first patterned circuit layer and a second patterned circuit layer are formed on a first surface and a second surface of the base material. A first insulation layer and a metal reflection layer are provided on the first patterned circuit layer and a portion of the first surface exposed by the first patterned circuit layer, wherein the metal reflection layer covers the first insulation layer, and a reflectance of the metal reflection layer is substantially greater than or equal to 85%, there is no conductive material between the first patterned circuit layer and the metal reflection layer. A first ink layer is formed on the first insulation layer before the metal reflection layer is formed.

Method for manufacturing a substrate structure with high reflectance

An LED illumination device and a color temperature switching method thereof are provided. The LED illumination device includes a bridge rectifier chip, a microcontroller module, a first semiconductor switch module, a second semiconductor switch module, a first current limiting module, a second current limiting module, and a first light-emitting module and a second light-emitting module. The microcontroller module includes a microcontroller chip. The first semiconductor switch module includes a first semiconductor switch chip for receiving a first pulse width modulation signal output from the microcontroller chip. The second semiconductor switch module includes a second semiconductor switch chip for receiving a second pulse width modulation signal output from the microcontroller chip. When the AC power is supplied to the LED illumination device, the first and the second semiconductor switch modules are turned on and maintained within a predetermined turn-on percentage range without being completely turned off.

LED illumination device and color temperature switching method thereof

A device comprises a plurality of nanosheets, source/drain stressors, and a gate structure wrapping around the nanosheets. The nanosheets extend in a first direction above a semiconductor substrate and are arranged in a second direction substantially perpendicular to the first direction. The source/drain stressors are on either side of the nanosheets. Each of the source/drain stressors comprises a first epitaxial layer and a second epitaxial layer over the first epitaxial layer. The first and second epitaxial layers are made of a Group IV element and a Group V element. An atomic ratio of the Group V element to the Group IV element in the second epitaxial layer is greater than an atomic ratio of the Group V element to the Group IV element in the first epitaxial layer.

Gate-all-around device

An LED illumination device for improving anti-surge capability includes a circuit substrate, a bridge rectifier chip, a surge absorber group, a first anti-surge current-limiting chip group, a second anti-surge current-limiting chip group, an LED illuminating group, and an LED current-limiting group. The surge absorber group is disposed on the circuit substrate and electrically connected to the bridge rectifier chip for absorbing a surge voltage. The first anti-surge current-limiting chip group is disposed on the circuit substrate for absorbing a first predetermined surge voltage. The second anti-surge current-limiting chip group is disposed on the circuit substrate for absorbing a second predetermined surge voltage. The LED illuminating group includes a plurality of LED chips disposed on the circuit substrate. The LED current-limiting group is disposed on the circuit substrate for controlling a total harmonic distortion of current (THDi) of the LED illuminating group.

LED illumination device for improving anti-surge capability

The present disclosure generally relates to a gate-all-around (GAA) transistor. The GAA transistor may include regrown source/drain layers in source/drain stressors. Atomic ratio differences among the regrown source/drain layers are tuned to reduce strain mismatch among the semiconductor nanosheets. Alternatively, the GAA transistor may include strained channels formed using a layer stack of alternating semiconductor layers having different lattice constants.

Semiconductor device and manufacturing method thereof

A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.

Substrate structure with high reflectance and method for manufacturing the same

A package structure for a backlight module includes a flexible base film, a plurality of pads, a light-emitting component, a patterned circuit layer. The flexible base film includes a plurality of conductive vias, a first surface, and a second surface opposite to the first surface. The conductive vias connect the first surface and the second surface. In addition, a material of the flexible base film includes polyimide and white fillings. The pads are disposed on the first surface. The conductive vias are connected to the pads. The light-emitting component is disposed on the pads and electrically connected to the pads. The patterned circuit layer is disposed on the second surface and electrically connected to the conductive vias.

Package structure for backlight module

A package structure for a display includes a flexible base film, a plurality of pads, a light-emitting component array, and a patterned circuit layer. The flexible base film includes a plurality of conductive vias, a first surface, and a second surface opposite to the first surface. The conductive vias connect the first surface and the second surface. A material of the flexible base film includes polyimide and black fillings. The pads are disposed on the first surface. The conductive vias are connected to the pads. The light-emitting component array includes a plurality of light-emitting component sets disposed on the pads and electrically connected to the pads. Each light-emitting component set includes a plurality of light-emitting components having different colors. The patterned circuit layer is disposed on the second surface and electrically connected to the conductive vias.

Package structure for display

A manufacturing method of a substrate structure including vias includes the following steps. A substrate is provided, wherein a material of the substrate includes polyimide. An etching stop layer is formed on the substrate, wherein the etching stop layer covers two opposite surfaces of the substrate. A patterned process is performed on the etching stop layer to form a plurality of openings exposing a part of the substrate. An etching process is performed on the substrate to remove the part of the substrate exposed by the openings and form a plurality of vias.

Manufacturing method for forming substrate structure comprising vias

A flexible printed circuit board structure includes a spiral flexible printed circuit board and a protection cover capable of providing functions of extensibility and retractility. The spiral flexible printed circuit board includes a flexible substrate curling up spirally, a patterned circuit layer and a plurality of electrical contacts. The patterned circuit layer is disposed on the flexible substrate. The electrical contacts are disposed on an end of the flexible substrate and electrically connected to the patterned circuit layer. The protection cover at least covers a part of the spiral flexible printed circuit board.

Flexible printed circuit board structure

A rigid-flex board structure includes a flexible printed circuit (FPC) board, a substrate, a reinforcing layer, a patterned circuit layer and a plurality of conductive vias. The FPC board includes at least one exposing area. The substrate is disposed on the FPC board and includes an opening exposing the exposing area. The reinforcing layer is embedded in the substrate and a rigidity of a material of the reinforcing layer is greater than a rigidity of a material of the substrate. The patterned circuit layer is disposed on the substrate. The conductive vias are configured to electrically connect the patterned circuit layer and the FPC board.

Growing community of inventors

Taipei, Taiwan

Yi-Chun Liu