Industrial Technology Research Institute

Taiwan Semiconductor Manufacturing Comp. Ltd.

International Business Machines Corporation

Other

Inventec Corp.

Inventec (pudong) Technology Corporation

Au Optronics Corporation

Wistron Corporation

Acer Inc.

National Yang Ming Chiao Tung University

Silicon Integrated Systems Corporation

Everlight Electronics Co., Ltd.

Powertech Industrial Co., Ltd.

Tci Co., Ltd.

Qnap Systems, Inc.

Yi-Chun Chen

Ryan Chia-Jen Chen

Chao Yuan Huang

Ming-Ching Chang

Yu-Hsien Lin

Cheng-Chung Chang

Jing-Cherng Tsai

Wen-Ping Chi

Li-Wei Yin

Shao-Hua Hsu

Tzu-Wen Pan

Shu-Yuan Ku

Ya-Yi Tsai

Shian-Jy Jassy Wang

Ching Ting

Shu-Hua Chan

Kai-Chi Chen

Yi-Wei Chiu

Li-Te Hsu

Wei-Chao Chen

I-Wei Yang

Ying Ting Hsia

Trista Pei-Chun Chen

Ryan Chia-jen Chen

Tsung Fan Yin

Lin Chung Liang

Min-Tsung Wu

Ting-Yi Wang

Meei-Yu Hsu

Daniel Stanley Young Tan

Zen-Jerr Hong

Chi-Ying Chang

Ren-Yang Horng

Po-I Liu

Jih-Jse Lin

Bao-Tsan Ko

Tian-Sheuan Chang

Wei-Han Chen

Chia-Hua Ho

Jing C Tsai

Wei-Ting Guo

W P Chao

David Chiuni Wang

Fan Yang

Yung-Hsiang Lin

Jung-Hui Hsu

Min-Chie Jeng

Chung-Chuan Hsieh

Kuo-Chen Shih

Hsi-Hsin Shih

Ke-Wei Su

Yu-Hwa E Sheu

Hsin Shao

Jen-You Chu

Jen-Hui Chuang

Min-Chao Chang

Chih-Hao Lin

Cheng Yuan Hsiao

Gue-Wuu Hwang

I-Hui Chen

Yu-Shan Chao

Ying-Jyh Yeh

Rong-Ming Ho

Yi Wei Lu

Chiung-Hui Huang

Shiun-Chang Jan

Chien-Lung Huang

Wen Tsui

Mei-Hua Wang

Sheng Te Yang

Hsih-Bin Dai

Feng-Sheng Kao

Chih-Ping Chen

Bor-Ping Wang

Hui-Ju Lin

Chin-Hua Chen

Yi-Ling Chen

Chao-Ying Yu

Tsai-Tien Su

Yi-Shun Huang

Ching-Yen Wei

Chin-Ping Huang

Hui-Hsin Shih

Yun-Ching Tsai

Tan-Chi Ho

Jia-Lin Lo

Feng-Ling Hsiao

Cheng-Yang Lai

Yi-Hsuan Cheng

Te-Cheng Lee

Yeo-Wan Chiang

Kuang-Kai Liu

Yi-De Liou

Ming-Siao Hsiao

Yeu-Ding Chen

Sung-Song Hua

Hsinchi Chang

Meng-Jia Guo

Randy Lu-Hung Chang

Yi-Ting Chiu

A semiconductor device includes a substrate; a first fin structure extending along a first lateral direction; a second fin structure extending along the first lateral direction; a first gate structure extending along a second lateral direction and straddles the first fin structure; a second gate structure extending along the second lateral direction and straddles the second fin structure. The semiconductor device further includes a dielectric cut structure that separates the first and second gate structures from each other. The dielectric cut structure extends into the substrate and comprises a first portion and a second portion. A width of the first portion along the second lateral direction increases with increasing depth into the substrate and a width of the second portion along the second lateral direction decreases with increasing depth into the substrate. The second portion is located below the first portion.

Fin field-effect transistor and method of forming the same

A resin compound has a structure represented by a chemical formula (I): In the chemical formula (I), each Rindependently represents a C-Calkylene group or a C-Calkylarylene group, and Rare the same or different from each other; n independently represents an integer of 1-4; each Rindependently represents a C-Calkyl group or a C-Cterminal alkenyl group, and Rare the same or different from each other. When at least one of Rrepresents a C-Calkylene group, at least one of Ris a C-Cterminal alkenyl group.

Resin compound and resin composition containing the same

Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

Semiconductor structure cutting process and structures formed thereby

An anchored cut-metal gate (CMG) plug, a semiconductor device including the anchored CMG plug and methods of forming the semiconductor device are disclosed herein. The method includes performing a series of etching processes to form a trench through a metal gate electrode, through an isolation region, and into a semiconductor substrate. The trench cuts-through and separates the metal gate electrode into a first metal gate and a second metal gate and forms a recess in the semiconductor substrate. Once the trench has been formed, a dielectric plug material is deposited into the trench to form a CMG plug that is anchored within the recess of the semiconductor substrate and separates the first and second metal gates. As such, the anchored CMG plug provides high levels of resistance to reduce leakage current within the semiconductor device during operation and allowing for improved V-trigger performance of the semiconductor device.

Semiconductor device with cut metal gate and method of manufacture

An encoded substrate to be filmed by a camera device for generating an image is provided. The encoded substrate includes a plurality of grids arranged in a form of two-dimensional array, wherein each grid includes a first pattern and a second pattern not overlapped with each other. The first pattern corresponds to a first-dimensional encoded value, and the second pattern corresponds to a second-dimensional encoded value. The image is processed by a processor for scanning the plurality of grids. In a first-dimensional direction, the processor outputs a first coordinate according to at least two first patterns corresponding to at least two consecutive grids among the plurality of grids. In a second-dimensional direction, the processor outputs a second coordinate according to at least two second patterns corresponding to at least two consecutive grids among the plurality of grids.

Encoded substrate, coordinate-positioning system and method thereof

A method of fabricating a semiconductor device is described. A plurality of semiconductor fins is formed in a first region on a substrate. An isolation region is formed around the plurality of semiconductor fins. Dummy fins are formed extending above the isolation region and laterally adjacent the plurality of semiconductor fins. A first etch is performed to etch the plurality of semiconductor fins such that a top surface of the plurality of semiconductor fins has a same height as a top surface of the isolation region. A second etch is performed selectively etching the isolation region to form a first recess in the isolation region laterally adjacent the semiconductor fins. A third etch is performed selectively etching the plurality of semiconductor fins to remove the plurality of semiconductor fins and to etch a second recess through the isolation region into the semiconductor substrate.

Semiconductor devices and methods of manufacturing thereof

Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.

Semiconductor structure having dielectric structure extending into second cavity of semiconductor Fin

A method of forming a gate structure includes forming an opening through an insulating layer and forming a first work function metal layer in the opening. The method also includes recessing the first work function metal layer into the opening to form a recessed first work function metal layer, and forming a second work function metal layer in the opening and over the first work function metal layer. The second work function metal layer lines and overhangs the recessed first work function metal layer.

Gate structure and method of forming the same

One or more computer processors identify a string within source code associated with a program integrated interface (PII). The one or more computer processors compare the identified string to a string entry comprised in a PII dictionary. The one or more computer processors, responsive to a match between the identified string and the string entry in the PII dictionary, classify the identified string as translatable or non-translatable based on a classification associated with the string entry. The one or more computer processors, responsive to a non-match between the identified string and the string entry in the PII dictionary, classify the identified string as translatable or non-translatable utilizing a hyperplane model trained with a margin (C) derived from unlimited search. The one or more computer processors, responsive to a classified translatable string, translate the classified translatable string.

Hardcoded string detection

A magnetic distribution detection method includes the steps of providing a magnetic sensor and a sample, selecting a multiple of measuring points on the sample, sensing the measuring points by the magnetic sensor, obtaining a multiple of sense data and a series of the heights of the magnetic sensor from each measuring point, using a signal decomposition algorithm to convert these sense data into data groups, and selecting one of the data groups as the magnetic distribution data of the sample.

Magnetic distribution detection method

A recording system of brewing pour over coffee which comprises a touch screen, a robotic manipulator and a storage unit. The touch screen displays information, such as coffee drippers, water amounts, etc, thereon and for a user to input a process of brewing pour over coffee thereon. The touch screen allows the user to manage the status of the pour over coffee in real-time. The robotic manipulator equipped with a water injection unit, which moves the water injection unit according to the process of brewing pour over coffee to pour water to a coffee dripper simultaneously to make coffee. The storage unit stores data, such as a position where the water to be poured, a route of the process of brewing pour over coffee, a speed of the pouring motion and the required amount of water to be poured during the process of brewing pour over coffee.

Recording system of brewing pour over coffee and computer program product thereof

Growing community of inventors

Hsinchu, Taiwan

Yi-Chun Chen