Taiwan Semiconductor Manufacturing Comp. Ltd.

Visera Technologies Company Limited

Yi-Chuan Lo

Clark Lee

Shui-Tien Lin

Hsun-Peng Lin

Cheng-I Sun

Wei-Hsuang Huang

Chih-Ming Hong

Ching-Hung Cheng

Yao-Hwan Kao

Fu-Tien Weng

Shin-Rung Lu

Ming-Tsung Chen

Chih-Hsiung Lee

Chia-Ling Yeh

Jun-Yih Yu

Jiang-He Xie

Ching Yu Chen

Chen-Yu Chang

Ming-Hsuan Chuang

Pravanshu Mohanta

Bii-Cheng Chang

Chang-Fa Lin

Yu Pen Fun

Hsiang-Ming Lin

Ben Fung

Hsiang-Min Lin

Jimmy Hu

Yung-Shun Liao

Strain relief trenches may be formed in a substrate prior to growth of an epitaxial layer on the substrate. The trenches may reduce the stresses and strains on the epitaxial layer that occur during the epitaxial growth process due to differences in material properties (e.g., lattice mismatches, differences in thermal expansion coefficients, and/or the like) between the epitaxial layer material and the substrate material. The stress and strain relief provided by the trenches may reduce or eliminate cracks and/or other types of defects in the epitaxial layer and the substrate, may reduce and/or eliminate bowing and warping of the substrate, may reduce breakage of the substrate, and/or the like. This may increase the center-to-edge quality of the epitaxial layer, may permit epitaxial layers to be grown on larger substrates, and/or the like.

Strain relief trenches for epitaxial growth

An optical test method is provided. The optical test method includes emitting light through a gap between two substrates of a tested optical element disposed on a holder to generate a plurality of light beams. The optical test method further includes driving the holder with the tested optical element to move to N positions. The optical test method also includes receiving one of the light beams from the tested optical element in the N positions to generate N first intensity signals. In addition, the optical test method includes determining the size of the gap of the tested optical element according to the N first intensity signals and reference data.

Optical test system and method for determining size of gap between two substrates of optical element

A system for fabricating a semiconductor device includes a first supplier, a second supplier, a mixer, and an applier. The first supplier is configured to supply a developer solution having a first chemical. The second supplier is configured to supply the second chemical to the mixer. The mixer is configured to mix the developer solution with a second chemical, in which the second chemical is configured to form a plurality of bubbles in the developer solution. The applier is configured to apply the developer solution mixed with the bubbles onto a photoresist layer formed on a substrate, in which the photoresist layer has an exposed region, and the first chemical is configured to dissolve the exposed region of the photoresist layer through a chemical reaction.

Method and system for fabricating semiconductor device

An exemplary wafer level package comprises a semiconductor wafer with a plurality of semiconductor chips of perfect polygonal shapes thereon. A circuit-free area is defined over the semiconductor wafer to electrically isolate the semiconductor chips. A dam structure is substantially formed over the circuit-free area, wherein a portion of the dam structure formed around an edge of the semiconductor wafer is formed with a plurality via holes therein. A transparent substrate is formed over the semiconductor wafer, defining a plurality of cavities between the semiconductor chips and the transparent substrate, wherein the transparent substrate is supported by the dam structure.

Wafer level package and mask for fabricating the same

A method for photolithography in semiconductor device manufacturing comprises defining test critical dimension target for a photolithography mask, measuring a mask critical dimension, comparing mask critical dimension to the test critical dimension target and determining a critical dimension deviation, determining a photolithography light base energy in response to the critical dimension deviation, and exposing the wafer according to the photolithography light base energy.

System and method for photolithography in semiconductor manufacturing

A multiple run by run process is described. A plurality of tools and a plurality of products to be run on the tools are provided. A desired recipe is calculated for each product on each tool based on a previous recipe used for each product on each tool and deviation of a parameter from a target value. Thereafter, the plurality of products is run on the plurality of tools. The desired recipe is updated after each run of each tool.

Multivariate RBR tool aging adjuster

A multiple run by run process is described. A plurality of tools and a plurality of products to be run on the tools are provided. Tool effects and product effects on a parameter are identified for each tool and each product. A desired recipe is calculated for each product on each tool based on the tool effects and product effects identified. Thereafter, the plurality of products is run on the plurality of tools. The desired recipe is updated after each run of each tool. Tool aging is calculated after each run of each tool based on the desired recipe used.

Multivariate RBR tool aging detector

An advanced process control method using time interval between lots of a particular product to control the weighting of feedback data is described. A plurality of products are fabricated wherein the products are tracked by the process control method based on product type, for example. Variation in a parameter is detected. The adjustment speed of a process recipe is determined based on a time interval weighting wherein the time interval is defined as the time between processing of lots of the same product type. The process recipe is updated at the determined adjustment speed to decrease variation of the parameter.

Method of using time interval in IC foundry to control feed back system

A spin-coater for coating a liquid material on a wafer that is equipped with a self-cleaning coating cup and a method for self-cleaning a spin-coater are described. The spin-coater is constructed of a coating cup of circular shape, a wafer pedestal situated in the cup, a coating material dispensing nozzle over the pedestal, a motor means for rotating the pedestal, and a solvent dispensing means that is mounted juxtaposed to an upper rim of the sidewall of the cup for dispensing a cleaning solvent onto an interior surface of the sidewall to dissolve and rinse off any liquid coating material splattered thereon and to prevent the formation of solid contamination from the solidified coating material.

Spin-coater with self-cleaning cup and method of using

An method and apparatus for aligning a mask to a wafer for photolithographic processing steps which does not use optical alignment. Each wafer is provided a unique identification code, such as a bar code. As wafers are processed through photolithographic steps where optical detection of an alignment mark can be easily accomplished the alignment data for each wafer is stored in a memory unit. At the next photolithographic step a detector reads the identification code and identifies the wafer being processed. The wafer identification is fed to a data processing unit which retrieves the alignment data for that wafer fro the memory unit. The data processing unit then feed alignment data to a mechanical controller which positions the wafer relative to the mask image being used in the photolithographic step.

Alignment method and apparatus using previous layer calculation data to

Growing community of inventors

Hsinchu, Taiwan

Yi-Chuan Lo