Oepic Semiconductors, Inc.

Yi-Ching Pao

Majid L Riaziat

Ta-Chung Wu

James Pao

Wilson Kyi

Ching-Kung Tzuang

A method of forming a flip chip backside Vertical Cavity Surface Emitting Laser (VCSEL) package comprising: forming a VCSEL pillar array; applying a dielectric layer to the VCSEL pillar array, the dielectric layer filling trenches in between pillars forming the VCSEL pillar array and covering the pillars; planarizing the VCSEL pillar array to remove the dielectric layer covering the pillars exposing a metal layer on a top surface of the pillars; applying a metal coating on the metal layer on a top surface of the pillars, the metal layer defining a contact pattern of the VCSEL pillar array; and applying solder on the metal coating to flip chip mount the VCSEL pillar array to a substrate package.

Planarization of backside emitting VCSEL and method of manufacturing the same for array application

A backside Vertical Cavity Surface Emitting Laser (VCSEL) has a substrate. A first mirror device is formed on the substrate. An active region is formed on the first mirror device. A second mirror device is formed on the active region. A pillar is formed by directional Inductive Coupled Plasma-Reactive Ion Etcher (ICP-RIE). The pillar exposes a portion of the first mirror device, the active region and the second mirror device. A first metal contact is formed over a top section of the pillar. A second metal contact is formed on the substrate. An opening formed in the second metal contact and aligned with the pillar.

Pillar confined backside emitting VCSEL

A flip chip backside Vertical Cavity Surface Emitting Laser (VCSEL) package has a VCSEL pillar array. A first metal contact is formed over a top section of each pillar of the VCSEL pillar array. A second metal contact is formed on a back surface of the VCEL pillar array. An opening is formed in the second metal contact and aligned with the pillars of the VCSEL pillar array. Solder tip is applied on each pillar of the VCSEL pillar array to flip chip mount the VCSEL pillar array.

Flip chip backside emitting VCSEL package

A photodiode has a substrate. A mesa structure is formed on the substrate, wherein the mesa structure has an n region containing an n type dopant formed on the substrate, an intermediate region positioned on the n region and a p region formed on the intermediate region and containing a p type dopant. A contact is formed on a top surface of the mesa and attached to the p region. The contact is formed around an outer perimeter of the mesa. The mesa has a diameter of 30 um or less.

High speed photo detectors with reduced aperture metal contact and method therefor

A method of semiconductor device fabrication that enables fine-line geometry lithographic definition and small form-factor packaging comprises: forming contacts on a metal layer of the semiconductor device; applying a protective mask layer over active regions and surfaces of the contacts having rough surface morphology; planarizing a surface of the semiconductor device until the protective mask layer is removed and the surfaces of the contacts having rough surface morphology are planarized; and forming contact stacks on the surfaces of the contacts which are planarized.

Planarization and flip-chip fabrication process of fine-line-geometry features with high-roughness metal-alloyed surfaces

Various methods and apparatuses extend the useful operation speed of TO-can optoelectronic packages up to speeds of 10 Gbps and beyond.

Growing community of inventors

Sunnyvale, CA, United States of America

Yi-Ching Pao