Wintek Corporation

Wintek Corporration

Yi-Cheng Tsai

Wen-Chun Wang

Chien-Ting Chan

Hsi-Rong Han

Kuo-Chang Su

Ming-Chang Yu

I-Fang Wang

Hen-Ta Kang

Wan-Jen Tsai

Yi-Chin Wang

Kai-Lun Kuo

A shift register comprises many stages, and each of stages comprises a first, a second and a third level control unit and a first and a second control unit is provided. The first and the second level control unit respectively provides a first clock signal and a voltage to an output terminal. The first driving unit and the level control unit are coupled to a first node. The first driving unit turns on and turns off the first level control unit in response to an input signal, a second control signal and a first control signal of the next stage. The second driving unit turns on and turns off the second level control unit in response to the first control signal. The third level control unit provides a first voltage to the output terminal in response to the second control signal and the first control signal.

Shift register

A liquid crystal display panel including an active device array substrate, an opposite substrate, and a liquid crystal layer is provided. The active device array substrate has at least one pixel unit including two active devices, two first pixel electrodes, and two common lines. Each of the active devices has a gate, a source, and a drain. The gates are connected with one another, the sources are connected with one another, and the pixel electrodes are connected with the drains. A first signal source connected with one of the common lines is different from a second signal source connected with the other one of the common lines. The opposite substrate has a common electrode connected with the first signal source. The liquid crystal layer is disposed between the active device array substrate and the opposite substrate.

Liquid crystal display panel

A shift register has shift register units. The nshift register unit includes first to third level control units and first and second driving units. The first and second level control units respectively provide a first clock signal and a first voltage to an output terminal. The first driving unit and the first level control unit are coupled to a first node, and a voltage on the first node is a first control signal. The first driving unit turns on and off the first level control unit in response to an input signal and second and third control signals. The second driving unit turns on and off the second level control unit in response to the first control signal. The third level control unit provides the first voltage to the output terminal in response to a front edge of the first control signal of the (n+2)shift register unit.

Shift register with each stage controlled by a specific voltage of the next stage and the stage after thereof

A pixel circuit structure applied in an LCD panel, which has a common voltage and includes at least one data line, is provided. The pixel circuit structure includes a first and a second circuit. The first circuit includes a first switch and a first capacitor. The second circuit includes a second switch, a third switch and a second capacitor. One end of the first capacitor receives the common voltage. Two ends of the first switch are respectively coupled to the data line and the other end of the first capacitor. The second and the third switch are coupled serially between the data line and a voltage source. One end of the second capacitor receives the common voltage, and the other end is coupled between the second and the third switch. The potential difference between the two ends of the first capacitor is different from that of the second capacitor.

Pixel circuit structure

A shift register is for generating scan signals. Each stage of the shift register comprises a first level lifting unit and at least a second level lifting unit, a first level lowering unit and at least a second level lowering unit, first and second driving units. The first level lowering and lifting units are for controlling the levels of signals at the first output terminal to output a first scan signal. The second level lowering unit and second level lifting unit are for controlling the levels of signals at the second output terminal to output at least a second scan signal. The first and second driving units are for turning on and off the first and the second level lifting units and the first and the second level lowering unit to control the first and second scan signals.

Shift register and liquid crystal display

A flat display including a display panel is disclosed. The display panel includes several signal lines and ESD protection circuits whose negative ESD protection circuits have cell test function. When a driving IC bonds to the display panel, the system operates in a normal dynamic display mode, and the negative ESD protection circuits are coupled to a low-level voltage such that thin film transistors of the negative ESD protection circuit are switched off in the normal display mode. Therefore, the power consumption of the panel module can be reduced and using time of the products can be improved.

Growing community of inventors

Chiayi County, Taiwan

Yi-Cheng Tsai