Microsoft Technology Licensing, LLC

Other

Yevgeniy Bak

Mehmet Iyigun

Landy Wang

Emily Nicole Wilson

Kirsten Valery Stark

Cenk Ergan

Alexander Kirshenbaum

Arun Upadhyaya Kishan

Michael Richard Fortin

Brian E King

Patrick L Stemen

Neel K Jain

Vasilios Karagounis

Sushu Zhang

Robin Andrew Alexander

Andrew M Herron

Xiaozhong Xing

Eric Bluestein

Kevin Michael Broas

Benjamin A Mickle

David Fields

Ishwar Agarwal

Kenneth Dean Johnson

Jonathan E Lange

James A Schwartz, Jr

Nicholas Stephen Judge

Andrew D Rogers

Hari R Pulapaka

Benjamin M Schultz

George Zacharias Chrysos

Neill Michael Clift

David Hepkin

Pedro Miguel Sequeira De Justo Teixeira

Lisa Ru-feng Hsu

Brandon Allsop

Oscar Rosell Martinez

Christopher Peter Kleynhans

Syed Aunn Hasan Raza

Qi Zhang

Bruce Lee Worthington

Mark Yalovsky

Rolf Arnold Ebeling

Lars Reuther

Roy Williams

Jon Robert Berry

Jason Lin

Parag Sharma

Yimin Deng

Youssef M Barakat

Matthew Ryan Miller

Jeffrey Che Fuller

Daniel Sebastian Berger

Stuart Sechrest

Gregory John Colombo

Yau Ning Chin

Michael Bishop Ebersol

Vishal Sharda

Aaron Edward Dietrich

Wen Jia Liu

Shawn M Woods

Ahmed Saruhan Karademir

Peter Seraphim Ponomarev

Prashant Ratanchandani

Ryan M Hurst

YongKang Zhu

Russell Charles Hadley

Chiuchin Chen

Christina L Rhodes

Jason Carl Hendrickson

Mahlon David Fields

Jordan Thomas Rabet

Ripal Babubhai Nathuji

Morakinyo Korede Olugbade

Maxwell Christopher Renke

Pavlo Lebedynskiy

Russell Bivens Keldorph

Joseph Norman Bialek

Ishfaq Mohammad Ismail

Vijay Sundaram

Tai Hing Tse

John Corey Morgan

Stephen Louis-Essman Hufnagel

Jonathan M Au

Apurva Ashvinkumar Thanky

Shawn Michael Denbow

Hemchand Alla

Ben Mickle

Gabriel Thomas Kodjo Dos Reis

Xiang Fan

Syed A Raza

Pranav Kant

Vijaykumar Sharma

Alex Kirshenbaum

Adam M Zabrocki

Shawn Daniel Hoffman

Kirsten V Stark

Neel Jain

A device calculates a memory oversubscription threshold for a virtual machine (VM). Based on the memory oversubscription threshold, the device determines a first memory size to be physically allocated to the VM, and a second memory size to be oversubscribed to the VM. The device configures a first virtual non-uniform memory access (NUMA) node comprising a virtual processor and a first virtual memory having the first memory size. The device allocates a first physical memory to back the first virtual memory. The device configures a second virtual NUMA node comprising a second virtual memory having the second memory size. The second virtual NUMA node is a computeless NUMA node. The device configures the VM to use the first virtual NUMA node and the second virtual NUMA node. Based on the second virtual NUMA node being computeless, the VM funnels a memory access to the first virtual memory.

Using virtual non-uniform memory access nodes to funnel virtual machine memory accesses

Techniques for computer memory management are disclosed herein. In one embodiment, a method includes in response to receiving a request for allocation of memory, determining whether the request is for allocation from a first memory region or a second memory region of the physical memory. The first memory region has first memory subregions of a first size and the second memory region having second memory subregions of a second size larger than the first size of the first memory region. The method further includes in response to determining that the request for allocation of memory is for allocation from the first or second memory region, allocating a portion of the first or second multiple memory subregions of the first or second memory region, respectively, in response to the request.

Computer memory management in computing devices

Systems and methods related to direct swap caching with zero line optimizations are described. A method for managing a system having a near memory and a far memory comprises receiving a request from a requestor to read a block of data that is either stored in the near memory or the far memory. The method includes analyzing a metadata portion associated with the block of data, the metadata portion comprising: both (1) information concerning whether the near memory contains the block of data or whether the far memory contains the block of data and (2) information concerning whether a data portion associated with the block of data is all zeros. The method further includes instead of retrieving the data portion from the far memory, synthesizing the data portion corresponding to the block of data to generate a synthesized data portion and transmitting the synthesized data portion to the requestor.

Direct swap caching with zero line optimizations

To increase the speed with which a Second Layer Address Table (SLAT) is traversed, memory having the same access permissions is contiguously arranged such that one or more hierarchical levels of the SLAT need not be referenced, thereby resulting in more efficient SLAT traversal. 'Slabs' of memory are established whose memory range is sufficiently large that reference to a hierarchically lower level table can be skipped and a hierarchically higher level table's entries can directly identify relevant memory addresses. Such slabs are aligned to avoid smaller intermediate memory ranges. The loading of code or data into memory is performed based on a next available memory location within a slab having equivalent access permissions, or, if such a slab is not available, or if an existing slab does not have a sufficient quantity of available memory remaining, a new slab with the proper access permissions is established.

Faster computer memory access by reducing SLAT fragmentation

Systems and methods related to direct swap caching with noisy neighbor mitigation and dynamic address range assignment are described. A system includes a host operating system (OS), configured to support a first set of tenants associated with a compute node, where the host OS has access to: (1) a first swappable range of memory addresses associated with a near memory and (2) a second swappable range of memory addresses associated with a far memory. The host OS is configured to allocate memory in a granular fashion such that each allocation of memory to a tenant includes memory addresses corresponding to a conflict set having a conflict set size. The conflict set includes a first conflicting region associated with the first swappable range of memory addresses with the near memory and a second conflicting region associated with the second swappable range of memory addresses with the far memory.

Direct swap caching with noisy neighbor mitigation and dynamic address range assignment

Dynamically overriding a function based on a capability set. A computer system reads a portion of an executable image file. The portion includes a first memory address corresponding to a first callee function implementation. The first memory address was inserted into the portion by a compiler toolchain. Based on extensible metadata included in the executable image file, and based on a capability set that is specific to the computer system, the computer system determines a second memory address corresponding to a second callee function implementation. Before execution of the portion, the computer system modifies the portion to replace the first memory address with the second memory address.

Dynamically overriding a function based on a capability set

Enacting a compliance action using an assessment that considers a mix of coldpatches and hotpatches includes identifying a policy defining the compliance condition based on patching status of a software component. A patching state of the software component is determined, including identifying evidence of coldpatched binary file(s) and hotpatch binary file(s) applicable to the software component, and using the evidence to determine whether or not the hotpatch binary file(s) have been applied to a memory image into which an instance of the software component is loaded. Based on the policy and on the patching state of the software component, a compliance action is enacted for the compliance condition. The compliance action includes generating a health report or a health attestation, initiating a patching action, initiating an execution control action, and the like.

System compliance based on a mix of hotpatches and coldpatches

To increase the speed with which the hierarchical levels of a Second Layer Address Table (SLAT) are traversed as part of a memory access where the guest physical memory of a virtual machine environment is backed by virtual memory assigned to one or more processes executing on a host computing device, one or more hierarchical levels of tables within the SLAT can be skipped or otherwise not referenced. While the SLAT can be populated with memory correlations at hierarchically higher-levels of tables, the page table of the host computing device, supporting the host computing device's provision of virtual memory, can maintain a corresponding contiguous set of memory correlations at the hierarchically lowest table level, thereby enabling the host computing device to page out, or otherwise manipulate, smaller chunks of memory. If such manipulation occurs, the SLAT can be repopulated with memory correlations at the hierarchically lowest table level.

Faster access of virtual machine memory backed by a host computing device's virtual memory

Communicating a low-latency event across a virtual machine boundary. Based on an event signaling request by a first process running at a first virtual machine, the first virtual machine updates a shared register that is accessible by a second virtual machine. Updating the shared register includes updating a signal stored in the shared register. The first virtual machine sends an event signal message, which includes a register identifier, through a virtualization fabric to the second virtual machine. The second virtual machine receives the event signaling message and identifies the register identifier from the message. Based on the register identifier, the second virtual machine reads the shared register, identifying a value of the signal stored in the shared register. Based at least on the value of the signal comprising a first value, the second virtual machine signals a second process running at the second virtual machine.

Low-latency events across a virtual machine boundary

Multiple partitions can be run on a computing device, each partition running multiple processes referred to as a workload. Each of the multiple partitions, is isolated from one another, preventing the processes in each partition from interfering with the operation of the processes in the other partitions. Using the techniques discussed herein, some memory pages of a partition (referred to as a sharing partition) can be shared with one or more other partitions. The pages that are shared are file backed (e.g., image or data files) or pagefile backed memory pages. The sharing partition can be, for example, a separate partition that is dedicated to sharing memory pages.

Shared memory in memory isolated partitions

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Redmond, WA, United States of America

Yevgeniy Bak