Actel Corporation, Inc.

Yeouchung Yen

Frank W Hawley

Abdul R Forouhi

Shih-Oh Chen

John L McCollum

Wenn-Jei Chen

Hung-Kwei Hu

Linda Liu

Huan-Chung Tseng

Steve S Chiang

According to a first aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer under a plug of an electrically conductive material disposed between two metallization layers. According to a second aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer comprising a first nitride/first amorphous silicon/second nitride/second amorphous silicon sandwich under a plug of an electrically conductive material lined with titanium disposed between two metallization layers. In this aspect of the invention the titanium is allowed to react with the second amorphous silicon layer to form an electrically conductive silicide. This leaves the first nitride/first amorphous silicon/second nitride as the antifuse material layer while guaranteeing a strict control on the thickness of the antifuse material layer for assuring strict control over its respective breakdown or programming voltage. According to a third aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer disposed over a plug of an electrically conductive material disposed between two metallization layers.

Fabrication method for metal-to-metal antifuses incorporating a tungsten

Above via metal-to-metal antifuses incorporating a tungsten via plug

A method for fabricating the antifuse of the present invention comprises the steps of forming a lower antifuse electrode; forming a relatively thick interlayer dielectric layer over the surface of the lower antifuse electrode; forming a masking layer, preferably a photoresist, including an aperture therein having a first area over the interlayer dielectric layer; performing a first vertical etching step on the interlayer dielectric layer to a first selected depth; enlarging the aperture in the masking layer until it has a second area; performing a final vertical etching step on the interlayer dielectric layer to expose the upper surface of the lower electrode. Depending on the thickness of the interlayer dielectric, additional enlarging steps and vertical etching steps may be performed prior to the final vertical etching step which exposes the upper surface of the lower electrode. An aperture having a staircase profile is thereby formed, the aperture having a number of steps thus reducing and/or eliminating cusping and/or thinning at the corner and bottom of the antifuse cell opening allowing for the uniform deposit of dielectric and upper antifuse electrode materials.

Method for fabricating an electrically programmable antifuse

The present invention is directed to providing an electrostatic discharge ('ESD') protection cell for use in an integrated circuit device including antifuses. The ESD protection cell is formed simultaneously with the antifuses that it protects and provides protection from ESD during the fabrication of the antifuses. The concept is to use thin undoped or doped polysilicon on top of antifuse material as a block etching mask for the formation of the ESD protection cells by using common etching techniques. This polysilicon mask is placed where the antifuses will be and not where the ESD protection cells will be. The polysilicon mask is then merged with a top polysilicon electrode during later processing. During the block etching process, the antifuse material layer is compromised in the region about the ESD protection cells. Where the antifuse material layer is an O--N--O sandwich, the top oxide and nitride layers may be etching during the block etching process leaving the thin bottom oxide layer and some or no residual bottom oxide of the ONO composite antifuse material layer for forming the ESD protection cell. Since etching into the bottom oxide of the ONO composite antifuse material layer will not degrade, but will enhance the ESD protection capability of the ESD protection cell, it is perfectly acceptable to also etch the bottom oxide layer as well as long as proper process control is allowed. The ESD protection cell may be used with antifuses having diffusion or polysilicon type bottom electrodes and polysilicon top electrodes. An advantage of this structure is its ability to be fabricated at high temperature for improved film characteristics and reliability.

Method for forming an ESD protection device for antifuses with top

The antifuse structure of the present invention includes a bottom planarized electrode, an ILD disposed over the bottom electrode, an antifuse cell opening in and through the ILD exposing the bottom electrode, a first barrier metal layer disposed by means of collimated sputter deposition in the antifuse cell opening to form a layer of uniform thickness existing only within the antifuse cell opening in order to protect the antifuse material layer from diffusion from the bottom electrode and to form an effective bottom electrode of reduced area, hence reducing the capacitance of the device, an antifuse material layer disposed in the antifuse cell opening and over the first barrier metal layer, a second barrier metal layer disposed over the antifuse material layer and optionally formed by collimated sputter deposition, and a top electrode disposed over the second barrier metal layer.

Method of making metal to metal antifuse

According to a first aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer under a plug of an electrically conductive material disposed between two metallization layers, According to a second aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer comprising a first nitride/first amorphous silicon/second nitride/second amorphous silicon sandwich under a plug of an electrically conductive material lined with titanium disposed between two metallization layers. In this aspect of the invention the titanium is allowed to react with the second amorphous silicon layer to form an electrically conductive silicide. This leaves the first nitride/first amorphous silicon/second nitride as the antifuse material layer while guaranteeing a strict control on the thickness of the antifuse material layer for assuring strict control over its respective breakdown or programming voltage. According to a third aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer disposed over a plug of an electrically conductive material disposed between two metallization layers.

Metal-to-metal antifuse with conductive

A method for fabricating a metal-to-metal antifuse comprises the steps of (1) forming and defining a first metal interconnect layer; (2) forming an interlayer dielectric layer; (3) forming an antifuse via in the interlayer dielectric layer to expose the first metal interconnect layer; (4) depositing a via metal layer into a portion of the volume defining the antifuse via; (5) forming a planarizing layer of an insulating material in the antifuse via sufficient to fill a remaining portion of the volume defining the antifuse via; (6) etching the planarizing layer to expose an upper surface of the via metal layer and an upper surface of the interlayer dielectric layer so as to form a substantially planar surface comprising the upper surface of the interlayer dielectric layer, the planarizing layer, and the upper surface of the via metal layer; (7) forming an antifuse material layer over the substantially planar surface; (8) forming a metal capping layer over the antifuse material layer; and (9) defining the antifuse material layer and the metal capping layer.

Above via metal-to-metal antifuse

ESD protection device for antifuses with top polysilicon electrode

An antifuse comprises a lower electrode and an upper electrode separated by an interlayer dielectric. An antifuse cell opening is disposed in the interlayer dielectric. The antifuse cell opening comprises at least two steps, wherein a first portion thereof has a first area and a second portion thereof disposed above the first portion has a second area larger than said first area. Additional portions may be provided above the second portion having successively larger areas if the thickness of the interlayer dielectric warrants their inclusion.

Electrically programmable antifuse having stair aperture

Metal to metal antifuse

A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer. Antifuse material is disposed in the second-sized aperture, and the upper electrode extends over the second aperture as well as the first aperture. A preferred process for fabricating the protection device utilizes the step of forming the smaller apertures and forming their antifuse material layers simultaneously with forming the antifuse apertures. A static-charge protection device for an antifuse device includes an additional second-sized aperture larger in area than the first-sized antifuse apertures. Metal plug material is deposited and etched back. A layer of amorphous silicon antifuse material is formed and defined over the first and second sized apertures, the portion formed over the larger partially filled antifuse protection device cell being thinner.

Growing community of inventors

San Jose, CA, United States of America

Yeouchung Yen