Au Optronics Corporation

Quanta Display Inc.

Yeong-Feng Wang

Chih-Jui Pan

Liang-Bin Yu

Yi-Wei Lee

Chun-Hao Tung

Chih-Liang Liao

Chien-Hung Chen

I-Hua Ho

Liang-Pin Yu

Tien-Chun Huang

Tai-Chi Huang

Lift-off method and half-tone photolithography are used to fabricate LCD TFT array plate. Only two photo masks are used to respectively define a first and a second metal layers to accomplish the LCD TFT array plate.

LCD TFT array plate and fabricating method thereof

A liquid crystal display array substrate. A trench is in a substrate. A gate, a gate dielectric layer, a semiconductor layer and a doped semiconductor layer are disposed in the trench, wherein the semiconductor layer comprises a channel. A source electrode and a drain electrode are respectively electrically connected to portions of the semiconductor layer on opposite sides of the channel.

Array substrate for LCD and method of fabrication thereof

A pixel module comprising a first transistor, a second transistor, and a connection line is disclosed. The first transistor is coupled to a first gate line, a source line, and a first drain line. The second transistor is coupled to a second gate line, the source line, and a second drain line. The connection line overlaps and isolates the first and the second drain lines.

Pixel module and display device utilizing the same

A liquid crystal display device is disclosed, which comprises an upper substrate, a lower substrate, and a liquid crystal layer. The lower substrate has several pixel electrodes, metal lines, and switch elements thereon. Each switch element comprises a source electrode, a drain electrode, a gate electrode, and an opening between the source electrode and the drain electrode. A passivation layer covering the surface of the source electrode and the drain electrode forms two inclined planes separately on two sides. The two inclined planes face each other and are locating on a kink or step of the source electrode and drain electrode. The inclined planes also contact each other at the upper side of the opening. The inclinations of the inclined planes to the lower substrate are in a range from 5 to 50 degrees.

Liquid crystal display device comprising a passivation layer which forms two inclined planes on opposing sides of grooves formed on a top surface of the lower substrate

A liquid crystal display (LCD) array substrate and its manufacturing method are provided. Scan lines and data lines of the LCD array substrate are composed of two conductive layers to decrease their RC delay. Moreover, the dielectric layer and even the planarization layer are removed from pixel areas defined by the scan lines and the data lines to increase the light penetration percentage.

Liquid crystal display array substrate and its manufacturing method

Liquid crystal display device comprising a passivation layer having a depression or cavity at the steps of the source and drain electrodes

A method for manufacturing a liquid crystal display device is disclosed. The method includes the steps of: forming multiple spacers having a cavity on the upper substrate or on the lower substrate; injecting adhesives or binders in the cavities of the spacers; and curing the adhesives or the binders in the cavities to bind the upper substrate and the lower substrate. Through the method illustrated above, the strength for combining these two substrates can be enhanced. Moreover, the uniformity of the gap inside the LCD panel, and the gravity mura resulted from the gravity can be improved. Therefore, the lifetime of the LCD can be extended.

Method for manufacturing LCD panel comprising spacers having cavity filled with adhesive

A pixel unit comprising a first metal layer and a second metal layer. The first metal layer comprises a gate electrode and a first electrode. The second metal layer comprises a drain electrode, a source electrode, and a second electrode. The drain electrode overlaps the gate electrode in a first overlapping region. The source electrode overlaps the gate electrode in a second overlapping region. The second electrode overlaps the first electrode in a third overlapping region. The size of the first electrode approximates that of the second electrode. The first electrode and the second electrode are staggered.

Pixel unit and display device utilizing the same

A TFT array substrate includes a substrate, a patterned first metallic layer, a patterned stack layer, a patterned dielectric layer, a patterned transparent conductive layer, and a patterned third metallic layer. Elements of each TFT in the TFT array substrate are arranged vertically, so that the TFT array substrate has relatively small fabrication area and is operable with a high conducting current. Further, the storage capacitance can be enhanced by enclosing or sandwiching the second metallic layer with the common lines and the transparent electrodes. In such a way, pixel flashing caused by those coupled signals can be reduced, thus promoting displaying quality thereof.

Thin film transistor array substrate

A TFT array substrate is provided. The TFT array substrate includes a substrate, a patterned first metallic layer, a patterned semiconductor layer, a patterned transparent conductive layer, a patterned dielectric layer, and a patterned second metallic layer. Elements of each TFT of the TFT array substrate are arranged vertically, so that the TFT array substrate has relatively small fabrication area and is operable with a high conducting current. Further, the storage capacitance can be enhanced by enclosing or sandwiching the transparent electrodes with the common lines and the second metallic layer, or alternatively by enclosing or sandwiching the second metallic layer with the common lines and the transparent electrodes.

Growing community of inventors

Hsin-Chu, Taiwan

Yeong-Feng Wang