Samsung Display Co., Ltd.

Yeon Taek Jeong

Bo Sung Kim

Tae-Young Choi

June Whan Choi

Seung-Ho Jung

Chan Woo Yang

Doo Hyoung Lee

Hee Jun Byeon

Doo-Hyoung Lee

Kano Masataka

Young Min Kim

Kang Moon Jo

Seon-Pil Jang

Seung Sok Son

Ki Beom Lee

Sang Ho Kim

Se Dong Kim

Dong Gyu Kang

A display panel includes a first substrate including a first base substrate, a second substrate and a filling pattern. The first base substrate includes a display area including a plurality of pixel areas for image display and a non-display area around the display area, and an align key pattern including an opaque material in a part of the non-display area. The second substrate includes a second base substrate overlapping the first base substrate and including a transparent material, a light blocking structure in the non-display area, and a hole overlapping the align key pattern and penetrating the light blocking structure. The filling pattern is configured to fill the hole.

Display panel, including an align key pattern, and method for fabricating the same

A thin film transistor array panel includes: a substrate; a gate line and a common voltage line on the substrate and electrically separated from each other; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connecting member on the second passivation layer and electrically separated from each other. A first contact hole and a second contact hole are defined in the first and second passivation layers. The pixel electrode and the drain electrode are connected to each other through the second contact hole. The connecting member and the common electrode are connected to each other through the first contact hole.

Thin film transistor array panel and method of manufacturing the same

A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.

Thin film transistor and method of forming the same

A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.

Thin film transistor and manufacturing method thereof

A display device includes a first insulating substrate including a display area, a peripheral area and a test area, a gate conductor including a test element group gate electrode, a gate electrode and a gate line on the first insulating substrate, a gate insulating layer on the gate conductor, a semiconductor layer including a test element group semiconductor layer and a pixel semiconductor layer on the gate insulating layer, a data conductor including a test element group source electrode, a test element group drain electrode, a data line including a source electrode, and a drain electrode on the semiconductor layer, a first passivation layer on the data conductor, a test element group common electrode and a pixel common electrode on the first passivation layer, a second passivation layer on the test element group common electrode and the pixel common electrode, and a pixel electrode on the second passivation layer.

Display device and manufacturing method thereof

A thin film transistor array panel includes a source electrode and a drain electrode on an insulating substrate, an oxide semiconductor on the insulating substrate and overlapping the source electrode and the drain electrode, a passivation layer overlapping the oxide semiconductor and on the insulating substrate, a gate electrode on the passivation layer, and a pixel electrode connected to the drain electrode. The gate electrode and the pixel electrode include a same material. The oxide semiconductor is between the source electrode and the gate electrode, and between the drain electrode and the gate electrode in a cross-sectional view of the thin film transistor array panel.

Thin film transistor array panel and display device including the same, and manufacturing method thereof

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Seoul, South Korea

Yeon Taek Jeong