Semiconductor Components Industries, LLC

Yenting Wen

Yusheng Lin

Sudhama C Shastri

George Chang

Francis J Carney

Ryan J Hurley

Michael John Seddon

Chee Hiong Chew

Jefferson W Hall

Azhar Aripin

Mark A Thomas

Gary Horst Loechelt

James H Knapp

David M Heminger

Phillip Holland

Rong Liu

Earl D Fuchs

Michael A Stapleton

Harold Anderson

Wenjiang Zeng

Kisun Lee

Der Min Liou

Cang Ngo

Emily M Linehan

Li Jiang

Wang-Chang Albert Gu

Implementations of semiconductor packages may include: a prefabricated electrically conductive section; two or more metal oxide semiconductor field effect transistors (MOSFET) physically coupled together; and a back metal coupled to the two or more MOSFETs; wherein the electrically conductive section may be coupled to the back metal and may be configured to electrically couple the two or more MOSFETs together during operation of the two or more MOSFETs.

Semiconductor package and related methods

A sensor package includes a semiconductor die including at least one current sensor. The semiconductor die includes a first pass through hole extending from one side of the semiconductor die to an opposite side of the semiconductor die. The semiconductor package further includes a second pass through hole extending from one side of the sensor package to an opposite side of the sensor package. The second pass through hole is aligned with the first pass through hole and is configured to receive a current-carrying conductor. The at least one current sensor senses current flow in the current-carrying conductor received in the second pass through hole. An end of the current-carrying conductor is coupled to a terminal on a circuit board in the sensor package.

Current sensor packages

A semiconductor package includes a semiconductor die. A through hole in the semiconductor package and semiconductor die extends from one side of the semiconductor package and die to an opposite side of the semiconductor package and die. The through hole is configured to receive a current-carrying conductor there through. At least one current sensor is formed in, or on, the semiconductor die and configured to sense current flow in the current-carrying conductor received in the through hole.

Current sensor packages with through hole in semiconductor

Forming a semiconductor package includes coupling electrically conductive elements with a substrate, coupling a first die with one or more of the electrically conductive elements, and at least partially encapsulating the first die and electrically conductive elements in a first mold layer. A first redistribution layer (RDL) is placed over the first mold layer and electrically coupled with the first die. A second die is coupled with the first RDL, and the second die and first RDL are at least partially encapsulated in a second mold layer. A second RDL is formed over the second mold layer and is electrically coupled with the second die. A third mold layer at least partially encapsulates the second RDL. A portion of the substrate is removed to expose (and a solder mask is applied to) surfaces of the electrically conductive elements and of the first mold layer to form a stacked embedded package.

Embedded stacked die packages and related methods

In one embodiment, an electronic package structure includes a substrate having one or more conductive plane layers formed therein. The substrate also includes a plurality of conductive pads on major surface configured to provide electrical interconnects to a next level of assembly. At least one conductive plane layer is configured to have cut-outs above the solder pads so that at least portions of the solder pad are not overlapped by the conductive plane layer.

Package substrate structure for enhanced signal transmission and method

A semiconductor component and methods for manufacturing the semiconductor component that includes a monolithically integrated common mode choke. In accordance with embodiments, a transient voltage suppression device may be coupled to the monolithically integrated common mode choke.

Method for manufacturing a semiconductor component that includes a common mode choke and structure

A semiconductor component and a method of manufacturing the semiconductor component that reduces parasitic elements. A semiconductor chip is coupled to a semiconductor chip receiving area of a support structure. The semiconductor chip has at least two power semiconductor devices. A drain contact of a first power semiconductor device is coupled to a source contact of a second power semiconductor device and the drain and source contacts of the first and second power semiconductor devices are joined to the semiconductor chip receiving area. Another semiconductor chip may be bonded to a second semiconductor chip receiving area of the support structure. An energy storage element may be coupled between the source contact of the first power semiconductor device and the drain contact of the second semiconductor device. A protective structure may be formed over the semiconductor chips and the energy storage element.

Method for manufacturing a semiconductor component and structure therefor

In one embodiment, a filter structure that integrates one plate of a capacitor with an electrode of a transient voltage device. The filter structure includes a well region of one conductivity type formed in semiconductor substrate of an opposite conductivity type. The well region forms one plate of the capacitor and an electrode of the transient voltage suppression device. A dielectric layer is formed over a portion of the well region and a conductive layer is formed overlying the dielectric layer to provide a second plate of the capacitor. The dopant concentration of the well region provides a constant capacitance/voltage characteristic for the filter structure when a selected voltage range is applied to plates of the capacitor.

Filter having integrated floating capacitor and transient voltage suppression structure and method of manufacture

In one embodiment, a filter structure includes first and second filter devices formed using a semiconductor substrate. A vertical ground plane structure prevents cross-coupling between the first and second filter devices.

Integrated filter having ground plane structure

In one embodiment, a split well region of one conductivity type is formed in semiconductor substrate of an opposite conductivity type. The split well region forms one plate of a floating capacitor and an electrode of a transient voltage suppression device.

Semiconductor filter structure and method of manufacture

A semiconductor device () includes a semiconductor die () and an inductor () formed with a bonding wire () attached to a top surface () of the semiconductor die. The bonding wire is extended laterally a distance (L, L) greater than its height (H, H) to define an insulating core (). In one embodiment, the inductor is extended beyond an edge () of the semiconductor die to reduce loading.

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Chandler, AZ, United States of America

Yenting Wen