Taiwan Semiconductor Manufacturing Comp. Ltd.

Tsinghua University

National Taiwan University

Yen-Po Lin

Jiun-Ming Kuo

Yuan-Ching Peng

Wei-Yang Lee

Kuo-Yi Chao

Ming-Yuan Wu

Che-Yuan Hsu

Hung-Ju Chou

Yu-Shan Lu

Chia-Pin Lin

Jenn-Gwo Hwu

Chih-Chung Chang

Hung-Yin Tsai

You-Ting Lin

Shu-Wen Shen

Jen-Hong Chang

Chen-Hsuan Liao

Yen-Wen Huang

Ming-Hwei Perng

Te-An Yu

Jet-Rung Chang

Szu-Wei Huang

A method includes forming a p-well and an n-well in a substrate. The method further includes forming a stack of interleaving first semiconductor layers and second semiconductor layers over the p-well and the n-well, the first semiconductor layers having a first thickness and the second semiconductor layers having a second thickness different than the first thickness. The method further includes annealing the stack of interleaving semiconductor layers. The method further includes patterning the stack to form fin-shaped structures including a first fin-shaped structure over the n-well and a second fin-shaped structure over the p-well. The method further includes etching to remove the second semiconductor layers from the first and second fin-shaped structures, where the first semiconductor layers have a different thickness within each of the first and second fin-shaped structures after the etching. The method further includes forming a metal gate over the first and second fin-shaped structures.

Gate all around device and method of forming the same

A method includes forming a semiconductor substrate, forming hard mask layers (HMs) over the semiconductor substrate, forming first mandrels over the HMs, forming second mandrels along sidewalls of the first mandrels, forming a protective layer over the first mandrels and the second mandrels, removing a portion of the protective layer to expose portions of the first and the second mandrels, removing the exposed portions of the second mandrels with respect to the exposed portions of the first mandrels, removing remaining portions of the protective layer to expose remaining portions of the first and second mandrels, where the exposed portions of the first mandrels and the remaining portions of the first and second mandrels form a mandrel structure, patterning the HMs using the mandrel structure as an etching mask, and patterning the semiconductor substrate to form a fin structure using the patterned HMs as an etching mask.

Mandrel structures and methods of fabricating the same in semiconductor devices

A plurality of first semiconductor layers and second semiconductor layers are formed over a front side of a substrate. The first semiconductor layers interleave with the second semiconductor layers in a vertical direction. The first semiconductor layers and second semiconductor layers are etched into a plurality of stacks. The etching is performed such that a bottommost first semiconductor layer is etched to have a tapered profile in a cross-sectional view. The bottommost first semiconductor layer is replaced with a dielectric layer. The dielectric layer inherits the tapered profile of the bottommost first semiconductor layer. Gate structures are formed over the stacks. The gate structures each extend in a first horizontal direction. A first interconnect structure is formed over the gate structures. A second interconnect structure is formed over a back side of the substrate.

Tapered dielectric layer for preventing electrical shorting between gate and back side via

A method includes depositing a dummy semiconductor layer and a first semiconductor layer over a substrate, forming spacers on sidewalls of the dummy semiconductor layer, forming a first epitaxial material in the substrate, exposing the dummy semiconductor layer and the first epitaxial material, where exposing the dummy semiconductor layer and the first epitaxial material includes thinning a backside of the substrate, etching the dummy semiconductor layer to expose the first semiconductor layer, where the spacers remain over and in contact with end portions of the first semiconductor layer while etching the dummy semiconductor layer, etching portions of the first semiconductor layer using the spacers as a mask, and replacing a second epitaxial material and the first epitaxial material with a backside via, the backside via being electrically coupled to a source/drain region of a first transistor.

Semiconductor devices and methods of forming the same

A method for forming a semiconductor device structure is provided. The method includes forming an n-type doped region in a semiconductor substrate and forming a semiconductor stack over the semiconductor substrate. The semiconductor stack has multiple sacrificial layers and multiple semiconductor layers laid out alternately. The method also includes introducing n-type dopants from the n-type doped region into the semiconductor stack during the forming of the semiconductor stack. The method further includes patterning the semiconductor stack to form a fin structure and forming a dummy gate stack to wrap around a portion of the fin structure. In addition, the method includes removing the dummy gate stack and the sacrificial layers to release multiple semiconductor nanostructures made up of remaining portions of the semiconductor layers. The method includes forming a metal gate stack to wrap around the semiconductor nanostructures.

Formation method of semiconductor device with gate all around structure

A device comprises a substrate comprising a first portion and a second portion separated by an isolation region, a first gate structure over the first portion, a first drain/source region and a second drain/source region in the first portion and on opposite sides of the first gate structure, wherein the first drain/source region and the second drain/source have concave surfaces, a second gate structure over the second portion and a third drain/source region and a fourth drain/source region in the second portion and on opposite sides of the second gate structure, wherein the third drain/source region and the fourth drain/source have the concave surfaces.

FinFET contact structure and method for forming the same

An automatic search system and a method for assisting a mobile apparatus to search for a matching device are provided. The automatic search method includes the following steps. First, N sets of consecutive images are captured at N time points respectively when the mobile apparatus moves along a first direction. The N is a positive integer greater than 1. Next, the N sets of consecutive images are received, and several image features of the N sets of images are compared, so as to determine accordingly whether the matching device exists in the first direction. If it is determined that the matching device exists, a route signal and an adjustment signal are generated. Next, according to the route signal, the mobile apparatus is controlled to move to an adjacent position of the matching device. Also, according to the adjustment signal, the mobile apparatus is controlled to be combined with the matching device.

Automatic search system and method

A method of preparing high-k gate dielectrics by liquid phase anodic oxidation, which first produces a metallic film on the surface of a clean silicon substrate, next oxidizes the metallic film to form a metallic oxide as a gate oxidizing layer by liquid phase anodic oxidation, then promoting quality of the gate oxidizing layer by processing a step of thermal annealing. With this oxidation, a gate dielectric layer of high quality, high-k and ultrathin equivalent oxide thickness (EOT) can be produced, which can be integrated into a complementary metal oxide semiconductor (CMOS) production process directly.

High-k gate dielectrics prepared by liquid phase anodic oxidation

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Taipei, Taiwan

Yen-Po Lin