Taiwan Semiconductor Manufacturing Comp. Ltd.

Yen-Chun Huang

Tai-Chun Huang

Chih-Tang Peng

Tze-Liang Lee

Tien-I Bao

Bor Chiuan Hsieh

Chih-Ming Lai

Ming-Feng Shieh

Ken-Hsien Hsieh

Pei-Ren Jeng

Bang-Tai Tang

Chin-Hsiang Lin

Clement Hsingjen Wann

Chun Hsiung Tsai

Ling-Yen Yeh

Neng-Kuo Chen

Chi-Yuan Shih

Sey-Ping Sun

Gin-Chen Huang

Meng-Chun Chang

Ta-Chun Ma

Li-Chi Yu

Je-Ming Kuo

Ru-Gun Liu

Tsai-Sheng Gau

Kuang-Yuan Hsu

Tsu-Hsiu Perng

Jian-Shiou Huang

Shu Ling Liao

Fang-Yi Liao

Chi On Chui

Yen-Ming Chen

Teng-Chun Tsai

Yung-Cheng Lu

Li-Zhen Yu

Dian-Hau Chen

Chien-Hao Chen

Hsiang-Ku Shen

Jr-Hung Li

Wan-Yi Kao

Chia-Ying Lee

Chi-On Chui

Yu-Chang Lin

De-Wei Yu

Che-Hao Chang

Ying-Liang Chuang

Bo-Cyuan Lu

Shih-Wei Wang

Tsung-Chieh Hsiao

Hung-Yi Huang

Min-Hsiu Hung

Joy Cheng

Cheng-Po Chau

Ting-Ting Chen

Yu-Chung Su

Chia-Lin Chuang

Jin-Mu Yin

Ling-Fu Nieh

Pin-Chuan Su

Chun-Cheng Chou

Semiconductor devices including fin-shaped isolation structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a fin extending from a semiconductor substrate; a shallow trench isolation (STI) region over the semiconductor substrate adjacent the fin; and a dielectric fin structure over the STI region, the dielectric fin structure extending in a direction parallel to the fin, the dielectric fin structure including a first liner layer in contact with the STI region; and a first fill material over the first liner layer, the first fill material including a seam disposed in a lower portion of the first fill material and separated from a top surface of the first fill material, a first carbon concentration in the lower portion of the first fill material being greater than a second carbon concentration in an upper portion of the first fill material.

Semiconductor device and method

The present disclosure is generally related to semiconductor devices, and more particularly to a dielectric material formed in semiconductor devices. The present disclosure provides methods for forming a dielectric material layer by a cyclic spin-on coating process. In an embodiment, a method of forming a dielectric material on a substrate includes spin-coating a first portion of a dielectric material on a substrate, curing the first portion of the dielectric material on the substrate, spin-coating a second portion of the dielectric material on the substrate, and thermal annealing the dielectric material to form an annealed dielectric material on the substrate.

Cyclic spin-on coating process for forming dielectric material

A semiconductor device and a method of forming the same are provided. A device includes a substrate, a first isolation structure over the substrate, a first fin and a second fin over the substrate and extending through the first isolation structure, and a hybrid fin extending into the first isolation structure and interposed between the first fin and the second fin. A top surface of the first fin and a top surface of the second fin are above a top surface of the first isolation structure. A top surface of the hybrid fin is above the top surface of the first isolation structure. The hybrid fin includes an upper region, and a lower region under the upper region. The lower region includes a seam. A topmost portion of the seam is below the top surface of the first fin and the top surface of the second fin.

Hybrid fin structure of semiconductor device and method of forming same

A method includes depositing a first dielectric layer in an opening, the first dielectric layer comprising a semiconductor element and a non-semiconductor element. The method further includes depositing a semiconductor layer on the first dielectric layer, the semiconductor layer comprising a first element that is the same as the semiconductor element. The method further includes introducing a second element to the semiconductor layer wherein the second element is the same as the non-semiconductor element. The method further includes applying a thermal annealing process to the semiconductor layer to change the semiconductor layer into a second dielectric layer.

Seamless gap fill

Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.

Semiconductor device structure with salicide layer and method for forming the same

A cut-last process for cutting fin segments of a FinFET structure on a substrate utilizes a two-step process. After the fins are formed, an oxide material is deposited in the trenches of the FinFET structure. The oxide material can be an STI oxide or a low-stress dummy gapfill material. A fin segment can be removed by an etchant and can leave a concave shaped (such as a u-shape or v-shape) portion of silicon at the bottom of the fin. Where the oxide material is an STI oxide, the void left by removing the fin can be filled with replacement STI oxide. Where the oxide material is a dummy gapfill material, the dummy gapfill material can be removed and replaced with an STI oxide or converted to an STI oxide and filled with replacement STI oxide before or after the conversion.

FinFET structure and device

The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor device having an enhanced gap fill layer in trenches. The present disclosure provides a novel gap fill layer formed using a multi-step deposition and in-situ treatment process. The deposition process can be a flowable chemical vapor deposition (FCVD) utilizing one or more assist gases and molecules of low reactive sticking coefficient (RSC). The treatment process can be an in-situ process after the deposition process and includes exposing the deposited gap fill layer to plasma activated assist gas. The assist gas can be formed of ammonia. The low RSC molecule can be formed of trisilylamin (TSA) or perhydropolysilazane (PHPS).

Formation and in-situ treatment processes for gap fill layers

A method includes performing an atomic layer deposition (ALD) process to deposit a dielectric material over a substrate, curing the deposited dielectric material using an ultra violet (UV) light, and annealing the deposited dielectric material after the curing.

Semiconductor device and method for atomic layer deposition of a dielectric over a substrate

FinFET cut-last process using oxide trench fill

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Taipei, Taiwan

Yen-Chun Huang