Taiwan Semiconductor Manufacturing Comp. Ltd.

Global Unichip Corporation

Yen-Chih Chiu

Ting-Hao Wang

Chien-Cheng Wu

Cheng-Hong Tsai

Ming-Hsuan Wang

Sin-Huei Li

Hu-Cheng Jiang

Disclosed are a chip power consumption analyzer and an analyzation method thereof. The analyzation method includes the following. Design information of a circuit is received. A plurality of clock arriving times of a plurality of circuit cells in the circuit are calculated based on the design information, and a base cell type is set among a plurality of cell types according to the clock arriving times. Base demand current information of the base cell type is established, and a plurality of demand current information of the circuit cells is obtained. A plurality of demand peak currents of a plurality of bump current sources are predicted according to the demand current information and a plurality of position information of the circuit cells.

Chip power consumption analyzer and analyzing method thereof

A semiconductor wiring substrate includes a first wiring layer, a second wiring layer stacked on the first wiring layer, and a dielectric layer sandwiched between the first wiring layer and the second wiring layer. The first wiring layer includes first signal lines and first grounding lines which are interleaved and spaced apart in the first wiring layer. The second wiring layer includes second signal lines and second grounding lines which are interleaved and spaced apart in the second wiring layer. An orthographic projection of one of the second signal lines to the first wiring layer is located between each two adjacent ones of the first signal lines.

Wiring substrate having alternating ground and signal lines in a plurality of wiring layers

Growing community of inventors

Hsinchu, Taiwan

Yen-Chih Chiu