Industrial Technology Research Institute

Other

Sino Matrix Technology, Inc.

Yee-Lu Zhaog

Yen-Chen Chen

Gwo-Sheng Huang

Jeng-Shing Lee

Mao-Jin Chern

Chin-Chung Wen

Robert Hu

An intermittent oscillation circuit is disclosed, and more particularly, relates to an intermittent oscillation circuit utilized in a RF transmitting/receiving system. The intermittent oscillation circuit of the present invention comprises an inversion circuit, a power control circuit and a power supply circuit. By utilizing the power control circuit to controlling the operation voltage level outputted from the power supply circuit, the duty cycle of oscillatory signal outputted from the inversion circuit can be adjusted. Therefore, data collision is decreased while transmitting/receiving various data in the RF transmitting/receiving system, and the power consumption is decreased at the transmitting/receiving terminal as well.

Intermittent oscillation circuit

The present invention includes a parallel video format to field sequential video format conversion method wherein multiple analog signals that represent the magnitude of a set of colors that are components of the colors of a video display are converted to a set of digital video codes. This set of video codes buffered and rearranged to align with an input bus. The input bus is operably connected to a bus-exchange means which is operably coupled to a pair of Input/Output busses of two sets of dynamic random access memories. The Digital Video Codes are stored in sequence in the set of dynamic random access memories selected by the bus-exchange circuitry. The bus-exchange circuitry simultaneously selects the other set of the two sets of dynamic random access memories for connection to an Output Bus. The digital video codes are retrieved from the set of dynamic random access memories in a specific order by component color and placed on the output bus. The specifically ordered video codes are multiplexed to form a serial stream of digital video codes. The serial stream is converted in an analog-to-digital converter to an analog signal that is of the format acceptable to field sequential display.

Format converter for the conversion of conventional color display format

A multiple-beam field sequential color (FSC) display system is provided for receiving a stream of digitized single-beam image data to display a color image by employing a plurality of CRT guns to project multiple beams on a monochromatic CRT screen followed by converting a monochromatic refection from the CRT screen to the color image by using a liquid crystal color system (LCCS). The multiple-beam display system includes a multiple-beam image data memory which includes a plurality of data-banks. The multiple beam display system further includes an image data rearranging processor for rearranging and storing the plurality of digitized single-beam image data in the multiple beam-image data memory according to a pre-designated multiple-beam sequence in each of the data-banks. The multiple beam display system further includes a multiple-beam image data output controller for receiving a plurality of clock signals to control a sequence and timing of transmitting a multiple-beam image data from the multiple-beam data memory to the plurality of CRT guns for projecting the multiple beams for generating the color image.

Apparatus and method for rearranging digitized single-beam color video

A method for the conversion of conventional interlaced video display synchronization signals to those required for a field sequential color display interlaced video synchronization signals comprises the steps of receiving the conventional horizontal and vertical synchronization signals; multiplying the repetition rates of these signals by a factor that is number of component colors that comprise the colors of the video display; selecting time segments of the multiplied horizontal synchronization signals; phase shifting these selected time segments to align with the multiplied vertical synchronization signal; merging the phase shifted and the non-phase shifted time segments of the multiplied horizontal synchronization signal to form the field sequential color display horizontal synchronization signal; and amplifying and buffering the multiplied vertical synchronization signal and the field sequential color display horizontal synchronization signal to act as input to the deflection circuitry of a field is sequential color display.

Interlaced image synchronization method for field sequential display

The present invention discloses a data processing module for generating an interpolated output from four sampled input data. The data processing module includes an input means, i.e., a memory module, for receiving the four sampled input data. The data processing module further includes a pseudo four-point interpolation (PFPI) module for receiving a ratio value p and for generating the interpolated output by utilizing a novel pseudo four-point interpolation algorithm as represented by an Equation (6).

Growing community of inventors

Taoyuan, Taiwan

Yee-Lu Zhaog