Lucent Technologies Inc.

Nokia of America Corporation

Agere Systems Inc.

Nokia Solutions and Networks Oy

Avaya Technology LLC

Agere Systems Guardian Corp.

Yee Leng Low

Robert Charles Frye

Nagesh R Basavanhally

Yinon Degani

King Lien Tai

Thomas Dixon Dudderar

Dean Paul Kossives

Zhengxiang Ma

Stanley K Pau

Hui Wu

Ron Jay Barnett

David Andrew Ramsey

Kevin John O'Connor

Matthew Douglas Apau Jachowski

An optoelectronic circuit having a substantially planar double-sided substrate, each side of which has a respective plurality of electrically conducting tracks and a respective plurality of planar optical waveguides. The substrate also has at least one via crossing the substrate in a manner that can be used to establish an optical path across the substrate, e.g., between optical waveguides located on different sides thereof. In an example embodiment, the electrically conducting tracks and planar optical waveguides are configured to operatively connect various optoelectronic devices and auxiliary electrical circuits attached to the two sides of the substrate using hybrid-integration technologies. In some embodiments, two or more of such double-sided substrates can be stacked and optically and electrically interconnected to create an integrated three-dimensional assembly.

Optoelectronic circuit having one or more double-sided substrates

An optoelectronic device having three substantially planar substrates arranged such that one of the substrates is orthogonal to the other two substrates. In an example embodiment, the first substrate may have one or more photonic devices configured to emit or receive light traveling substantially orthogonally with respect to a major plane of the first substrate. The second substrate has an optical waveguide circuit thereon that is edge-coupled to receive (or transmit) the light from (to) the one or more photonic devices. The third substrate has an electrical circuit thereon and is connected to form an L-shaped junction with the first substrate, the L-shaped junction providing electrical connections between the corresponding electrical transmission lines located on the first and third substrates, e.g., to communicate electrical signals with the one or more photonic devices. In some embodiments, the optoelectronic device can be used to implement an optical transmitter or receiver.

Arrangement for connecting photonic and electronic components

A micro-miniature ion trap device comprises a wafer (or substrate) having a major surface, a multiplicity of electrodes forming a micro-miniature ion trap in a region adjacent the major surface when voltage is applied to the electrodes, characterized in that the multiplicity includes a first, planar annular electrode located over and rigidly affixed to the major surface, and at least one second, planar annular electrode located over and rigidly affixed to the major surface, the at least one second electrode being concentric with the first electrode. The at least one second electrode may be completely annular, in that the annulus forms a closed geometric shape, or it may be partially annular, in that the annulus has a slot or opening allowing access to the first electrode. In accordance with a preferred embodiment of our invention, the at least one second electrode is C-shaped, and the angle subtended by the C-shape is greater than 180 degrees.

Planar micro-miniature ion trap devices

The specification describes a packaging arrangement for micro-electromechanical systems (MEMS). The MEMS devices are mounted on a ceramic platform and are then packaged in a hybrid package. The hybrid package may be hermetically sealed. The hybrid package uses a ceramic insert as the primary MEMS device enclosure. The ceramic insert is mounted on a polymer printed wiring board, which provides both support and electrical interconnection for the ceramic insert. Optical access to the MEMS device is through a transparent window that may be hermetically sealed to the ceramic insert. The use of a ceramic primary enclosure for the MEMS device array substantially eliminates thermomechanical instabilities and provides thermomechanical and hermetic performance for the elements that require it. The main interconnection and routing function, implemented using standard epoxy printed circuit technology, yields high interconnection versatility and performance at low cost.

Packaging micromechanical devices

The specification describes methods for the manufacture of printed circuit cards which allow for final testing, including burn-in if required, of multiples of printed circuit cards as an integrated process panel prior to final packaging and singulation. This desired sequence of operations is made possible by the addition of arrays of test contacts at the edge of the integrated process panel where the test contacts can be accessed with an insertion test apparatus.

Manufacture of printed circuit cards

A bandpass planar filter (,) comprises a signal input and a signal output (,), and one or more resonator elements (,) coupled serially end-to-end between the input and the output across gaps (,) that separate the elements from the input, the output, and from each other. The resonator elements form a serpentine shape such that at least two portions of the serpentine shape are positioned side-by-side parallel to each other separated by a spacing (,). The side-by-side portions effect additional coupling between the resonator elements that forms a notch (transmission zero) (,) in the passband (,) of the filter. The input, output, and resonator elements are etched into one surface (,) of a PC board (,); the other surface (,) of the PC board forms a ground plane of the filter, and the substrate (,) of the PC board forms a dielectric of the filter.

Method of tuning a planar filter with additional coupling created by bent resonator elements

The specification describes a recessed chip MCM package with integrated electromagnetic shielding. The surfaces of the cavity which houses the IC devices are coated with metallization. The normally exposed top and side surfaces of the MCM package are also metallized. A solder wall is provided on the interconnect PCB which seals the gap between the MCM tile and the PCB interconnect substrate. The solder wall can be formed using standard solder bump technology, and the seal between the MCM and the PCB may be made during the same reflow operation that is used to flip-chip bond the MCM tile to the PCB.

Integrated circuit packages with improved EMI characteristics

The specification describes method for improving the edge acuity of conductive metal strips formed by thick film paste techniques. The advantages of the bulk properties of strips formed using thick film technology are realized while the drawback of poor edge definition is overcome using a thin film trim strip at the edge of the conductive strip.

Fabricating high-Q RF components

The specification describes a recessed chip IC package in which the cavity in the printed wiring board into which the IC chip is recessed is used as a through hole interconnection, thus increasing the interconnection density. If the through cavity interconnections are used as power and ground the signal I/O pads and the signal runners are effectively isolated.

Recessed flip-chip package

The specification describes interconnection layouts for chip-on-chip packages using solder bump interchip connections as vias between a single level metal interconnection pattern on the lower support IC chip and another single level interconnection pattern on the upper IC chip. This arrangement allows for the formation of air isolated crossovers of features on either chip.

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New Providence, NJ, United States of America

Yee Leng Low