Chartered Semiconductor Manufacturing Ltd (corporation)

Yee Chong Wong

Ting Cheong Ang

Shyue Fong Quek

Sang Yee Loong

Sang Yee Long

A double layered low dielectric constant material dual damascene metallization process is described. Metal lines are provided covered by an insulating layer overlying a semiconductor substrate. A first organic dielectric layer is deposited overlying the insulating layer. A second inorganic dielectric layer is deposited overlying the first dielectric layer. In a first method, a via pattern is etched into the second dielectric layer. The via pattern is etched into the first dielectric layer using the patterned second dielectric layer as a mask. Thereafter, a trench pattern is etched into the second inorganic dielectric layer to complete dual damascene openings. In a second method, a trench pattern is etched into the second dielectric layer. Thereafter, a via pattern is etched through the second inorganic dielectric layer and the first organic dielectric layer to complete dual damascene openings. In a third method, a via pattern is etched into the second dielectric layer. Then, simultaneously, the via pattern is etched into the first dielectric layer and a trench pattern is etched into the second inorganic dielectric layer to complete dual damascene openings in the fabrication of an integrated circuit device.

Double-layered low dielectric constant dielectric dual damascene method

A triple layered low dielectric constant material dual damascene metallization process is described. Metal lines are provided covered by an insulating layer overlying a semiconductor substrate. A first dielectric layer of a first type is deposited overlying the insulating layer. A second dielectric layer of a second type is deposited overlying the first dielectric layer. A via pattern is etched into the second dielectric layer. Thereafter, a third dielectric layer of the first type is deposited overlying the patterned second dielectric layer. Simultaneously, a trench pattern is etched into the third dielectric layer and the via pattern is etched into the first dielectric layer to complete the formation of dual damascene openings in the fabrication of an integrated circuit device. If the first type is a low dielectric constant organic material, the second type will be a low dielectric constant inorganic material. If the first type is a low dielectric constant inorganic material, the second type will be a low dielectric constant organic material.

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Yee Chong Wong