Hong Kong Applied Science and Technology Research Institute Company, Limited

Yat Tung Lai

Huimin Guo

Kwok Kuen (David) Kwong

Chun Fai Wong

Kam Hung Chan

Kwok Kuen David Kwong

Wai Po Wong

Wuxue Ni

Lu Chen

Zhongliang Zhou

Yujian Han

Lap Chi David Leung

Lap Chi (David) Leung

Ka Hung Kwok

An On-Off Shift Keying (OOK) receiver has non-continuous Automatic Gain Control (AGC) that sets gain at the beginning of each frame and locks the gain setting for the remainder of the frame, preventing OOK data from causing AGC loop instability. An AGC controller initializes to maximum the gain settings for a Low-Noise Amplifier (LNA), Low-Pass Filter (LPF), and a Programmable Gain Amplifier (PGA) in series that power a rectifier generating a voltage output to a 1/0 data decision circuit. A level detector compares the voltage output to two thresholds. When both thresholds are exceeded, the AGC controller steps down gain settings until the voltage output is between the two thresholds, when the gain settings are locked for the remainder of the current frame. A frame detector resets the AGC controller between frames when a long series of 0 data between frames is detected. LNA gain is reduced last.

Automatic Gain Control (AGC) for On-Off Shift-Keying (OOK) receiver

A voltage detector has a diode ladder with one or more diodes connected in series between a battery voltage input and an upper measuring node. A measuring diode is connected between the upper measuring node and a lower measuring node. A resistor and a power-down switch are connected in series between the lower measuring node and a ground. An analog input to an Analog-to-Digital Converter (ADC) is connected by a switch to the upper measuring node to generate an upper digital value. Then the switch connects the analog input to the lower measuring node to generate a lower digital value. The difference between the upper and lower digital values is the diode voltage drop across the measuring diode and is multiplied by a number of diodes in the diode ladder and added to the upper digital value to generate a battery voltage measurement.

Low-power voltage detector for low-voltage CMOS processes

A switch-less transceiver has parallel LC resonances that act as OFF switches and series LC resonances act as ON switches when resonating at the transmit (TX) or receive (RX) frequency. When the transmitter is disabled, no current flows through series LC filters. Instead, series impedances to ground provide an RF ground to the transmitter output node. A TX inductor between the transmitter output node and the antenna is in parallel with a TX blocking capacitor to ground, which together form a parallel resonance to ground that has a high impedance when resonating at the receiver frequency. This high impedance acts as an OFF switch to block antenna signals from entering the transmitter. The two paths are in parallel, presenting a high impedance to the antenna and forming an OFF switch when the receiver is disabled.

Switch-less connection for radio-frequency (RF) transceivers

An RC oscillator has a variable capacitor that sets the output frequency. The variable capacitor has m binary-weighted switched capacitor arrays, and each binary-weighted switched capacitor array has binary-weighted capacitors. p binary bits are decoded into an m-bit thermometer code that selects one of the m binary-weighted switched capacitor arrays to use n binary bits to switch its binary-weighted capacitors. Other binary-weighted switched capacitor arrays have all their capacitors switched on, or all their capacitors switched off by the thermometer code. The smallest or unit capacitance of each binary-weighted switched capacitor array is adjusted to compensate for the non-linear reciprocal relationship of frequency being proportional to 1/RC. The unit capacitance is increased for each successive binary-weighted switched capacitor array to reset to the ideal linear relationship of the (p,n)-bit code to frequency.

RC oscillator that uses thermometer codes to select a sub-array and binary codes to select capacitors or resistors within a sub-array for linear and monotonic tuning

A RF-to-DC converter charges a battery or powers a circuit from the energy of received radio waves. The RF energy received is very small for far-field applications, so the converter is highly sensitive. Four capacitor arrays are arranged in two banks. Buffered RF signals pump bottom plates of the capacitors. A series of L-switches in each bank connect between the two capacitor arrays in that bank. Each L switch has a pre-charge switch that charges that stage's input capacitor, and a stage-transfer switch that shares charge from the input capacitor to an output capacitor for that stage. Switches in the two banks alternately pre-charge and pump, with the left bank pumping while the right bank pre-charges. Switches are transistors with substrates tied to their sources or actively driven by substrate control signals. One bank may use n-channel transistors with the other bank uses p-channel transistors. Gate voltages may be boosted.

Quad-array diode-less RF-to-DC rectifying charge-pump converter for energy harvesting

A motor driver circuit for driving the gate node of a high-side driver transistor to a boosted voltage from a charge pump draws little or no static current from the charge pump. The gate node is pulled to the boosted voltage by a p-channel pullup-control transistor that is driven by p-channel transistors that are pumped by capacitors that cut off current flow to ground from the charge pump. An n-channel output-shorting transistor shorts the gate node to the output when the high-side driver is turned off. A coupling capacitor initializes the shorting transistor for each output transition. A p-channel output-sensing transistor generates a feedback to a second stage that drives the coupling capacitor. P-channel diode transistors and an n-channel equalizing transistor control the voltage on the coupling capacitor.

Bootstrapped high-side driver control without static DC current for driving a motor bridge circuit

A Optical Black Pixel (OBP) cancellation circuit corrects offsets in sensors in a CCD/CMOS image sensor when reading dark pixels such at the periphery. A pixel voltage is switched to a sampling capacitor during two phases of the same pixel pulse. Sampling capacitors and feedback capacitors connect to differential inputs of an amplifier. An accumulating capacitor accumulates voltage differences and generates a common-mode voltage that is fed back to another sampling capacitor that stores an amplifier offset. The sampling capacitor and accumulating capacitor and their associated switches form a discrete-time first-order low-pass filter that filters the pixel voltage during the first phase. In the second phase the amplifier acts as a unity-gain amplifier to output an average of the pixel voltage differences generated during an OBP time when blackened or covered pixels are read from the image sensor.

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Yat Tung Lai